Refactor SPI MISO setup #2557
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Refactor SPI MISO setup #2557
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bugadani
reviewed
Nov 17, 2024
bugadani
approved these changes
Nov 18, 2024
6 tasks
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I'll come back to this once I figure out how to craft up a good migration guide. But I'll close this for now as there's already enough (almost 30) lingering PRs that aren't being updated. |
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Would you mind reopening this? We've got through most of the backlog now, sorry about that 😅 |
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Sure! I still need to figure the migration guide so it might still linger for a while. |
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Small poke @Dominaezzz, would you mind rebasing and adding changelogs etc? |
added 3 commits
January 4, 2025 22:31
# Conflicts: # esp-hal/src/spi/master.rs # hil-test/tests/spi_full_duplex.rs
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Not sure what's going on with the HIL test, seeing as it times out rather than fails the assertion... I don't have time to investigate this weekend. |
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@Dominaezzz that issue is independent from this PR, we have some timing difficulties in ESP32. |
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cargo xtask fmt-packagescommand to ensure that all changed code is formatted correctly.CHANGELOG.mdin the proper section.Extra:
Pull Request Details 📖
Description
Fixes #2511 .
Not everyone wants to configure the "output part" of the MISO signal.
My thinking here is, most users see "MISO" as an input pin/signal. If they want the bidirectional variant, they should use
with_sio1to signify they want "Serial Input/Output" rather than "MISO".This also allows setting up loopback without
unsafe.For aesthetics, it might be worth having a
with_sio0(alongsidewith_miso), just so it reads better when also usingsio2,sio3, etc.Testing
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