fix dependencies

esp-hal/src/lib.rs

@@ -155,16 +155,19 @@ pub use xtensa_lx_rt::{self, entry};
 pub use self::soc::cpu_control;
 #[cfg(efuse)]
 #[instability::unstable]
+#[cfg_attr(not(feature = "unstable"), allow(unused))]
 pub use self::soc::efuse;
 #[cfg(lp_core)]
 #[instability::unstable]
+#[cfg_attr(not(feature = "unstable"), allow(unused))]
 pub use self::soc::lp_core;
 pub use self::soc::peripherals;
 #[instability::unstable]
 #[cfg(any(feature = "quad-psram", feature = "octal-psram"))]
 pub use self::soc::psram;
 #[cfg(ulp_riscv_core)]
 #[instability::unstable]
+#[cfg_attr(not(feature = "unstable"), allow(unused))]
 pub use self::soc::ulp_core;
 
 #[cfg(any(dport, hp_sys, pcr, system))]

esp-hal/src/soc/efuse_field.rs

@@ -110,6 +110,7 @@ impl Efuse {
     ///
     /// This function panics if the field's bit length is not equal to 1.
     #[inline(always)]
+    #[cfg_attr(not(feature = "unstable"), allow(unused))]
     pub fn read_bit(field: EfuseField) -> bool {
         assert_eq!(field.bit_len, 1);
         Self::read_field_le::<u8>(field) != 0

esp-hal/src/soc/esp32/mod.rs

@@ -9,14 +9,16 @@ use core::ptr::addr_of_mut;
 
 use crate::rtc_cntl::SocResetReason;
 
+crate::unstable_module! {
+    pub mod efuse;
+    #[cfg(feature = "quad-psram")]
+    pub mod psram;
+    pub mod radio_clocks;
+    pub mod trng;
+}
 pub mod cpu_control;
-pub mod efuse;
 pub mod gpio;
 pub mod peripherals;
-#[cfg(feature = "quad-psram")]
-pub mod psram;
-pub mod radio_clocks;
-pub mod trng;
 
 /// The name of the chip ("esp32") as `&str`
 #[macro_export]

esp-hal/src/soc/esp32c2/mod.rs

@@ -5,11 +5,13 @@
 //! The `SOC` module provides access, functions and structures that are useful
 //! for interacting with various system-related peripherals on `ESP32-C2` chip.
 
-pub mod efuse;
+crate::unstable_module! {
+    pub mod efuse;
+    pub mod radio_clocks;
+    pub mod trng;
+}
 pub mod gpio;
 pub mod peripherals;
-pub mod radio_clocks;
-pub mod trng;
 
 /// The name of the chip ("esp32c2") as `&str`
 #[macro_export]

esp-hal/src/soc/esp32c3/mod.rs

@@ -9,11 +9,13 @@
 //!    * I2S_SCLK: 160_000_000 - I2S clock frequency
 //!    * I2S_DEFAULT_CLK_SRC: 2 - I2S clock source
 
-pub mod efuse;
+crate::unstable_module! {
+    pub mod efuse;
+    pub mod radio_clocks;
+    pub mod trng;
+}
 pub mod gpio;
 pub mod peripherals;
-pub mod radio_clocks;
-pub mod trng;
 
 /// The name of the chip ("esp32c3") as `&str`
 #[macro_export]

esp-hal/src/soc/esp32c6/mod.rs

@@ -10,12 +10,14 @@
 //!    * I2S_DEFAULT_CLK_SRC: 2 - I2S clock source
 //!    * I2S_SCLK: 160_000_000 - I2S clock frequency
 
-pub mod efuse;
+crate::unstable_module! {
+    pub mod efuse;
+    pub mod lp_core;
+    pub mod radio_clocks;
+    pub mod trng;
+}
 pub mod gpio;
-pub mod lp_core;
 pub mod peripherals;
-pub mod radio_clocks;
-pub mod trng;
 
 /// The name of the chip ("esp32c6") as `&str`
 #[macro_export]

esp-hal/src/soc/esp32h2/mod.rs

@@ -10,11 +10,13 @@
 //!    * I2S_DEFAULT_CLK_SRC: 1 - I2S clock source
 //!    * I2S_SCLK: 96_000_000 - I2S clock frequency
 
-pub mod efuse;
+crate::unstable_module! {
+    pub mod efuse;
+    pub mod radio_clocks;
+    pub mod trng;
+}
 pub mod gpio;
 pub mod peripherals;
-pub mod radio_clocks;
-pub mod trng;
 
 /// The name of the chip ("esp32h2") as `&str`
 #[macro_export]

esp-hal/src/soc/esp32s2/mod.rs

@@ -13,15 +13,16 @@ use core::ptr::addr_of_mut;
 
 use crate::rtc_cntl::SocResetReason;
 
-pub mod efuse;
+crate::unstable_module! {
+    pub mod efuse;
+    #[cfg(feature = "quad-psram")]
+    pub mod psram;
+    pub mod radio_clocks;
+    pub mod trng;
+    pub mod ulp_core;
+}
 pub mod gpio;
 pub mod peripherals;
-#[cfg(feature = "quad-psram")]
-pub mod psram;
-pub mod radio_clocks;
-pub mod trng;
-
-pub mod ulp_core;
 
 /// The name of the chip ("esp32s2") as `&str`
 #[macro_export]

esp-hal/src/soc/esp32s3/mod.rs

@@ -13,16 +13,17 @@ use core::ptr::addr_of_mut;
 
 use crate::rtc_cntl::SocResetReason;
 
+crate::unstable_module! {
+    pub mod efuse;
+    #[cfg(any(feature = "quad-psram", feature = "octal-psram"))]
+    pub mod psram;
+    pub mod radio_clocks;
+    pub mod trng;
+    pub mod ulp_core;
+}
 pub mod cpu_control;
-pub mod efuse;
 pub mod gpio;
 pub mod peripherals;
-#[cfg(any(feature = "quad-psram", feature = "octal-psram"))]
-pub mod psram;
-pub mod radio_clocks;
-pub mod trng;
-
-pub mod ulp_core;
 
 /// The name of the chip ("esp32s3") as `&str`
 #[macro_export]

esp-hal/src/soc/mod.rs

@@ -53,16 +53,20 @@ pub struct MappedPsram {
 // Values other than 0 indicate that we cannot attempt setting the mac address
 // again, and values other than 2 indicate that we should read the mac address
 // from eFuse.
+#[cfg_attr(not(feature = "unstable"), allow(unused))]
 static MAC_OVERRIDE_STATE: AtomicU8 = AtomicU8::new(0);
+#[cfg_attr(not(feature = "unstable"), allow(unused))]
 static mut MAC_OVERRIDE: [u8; 6] = [0; 6];
 
 /// Error indicating issues with setting the MAC address.
 #[derive(PartialEq, Eq, Copy, Clone, Debug)]
+#[cfg_attr(not(feature = "unstable"), allow(unused))]
 pub enum SetMacError {
     /// The MAC address has already been set and cannot be changed.
     AlreadySet,
 }
 
+#[cfg_attr(not(feature = "unstable"), allow(unused))]
 impl self::efuse::Efuse {
     /// Set the base mac address
     ///