Merge branch 'main' into prefix

esp-alloc/Cargo.toml

@@ -4,20 +4,11 @@ version      = "0.5.0"
 edition      = "2021"
 rust-version = "1.68"
 description  = "A heap allocator for Espressif devices"
+keywords     = ["allocator", "embedded", "embedded-hal", "esp32", "espressif", "memory"]
+categories   = ["embedded", "memory-management", "no-std"]
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
 
-keywords = [
-    "allocator",
-    "esp32",
-    "riscv",
-    "xtensa",
-]
-categories = [
-    "memory-management",
-    "no-std",
-]
-
 [package.metadata.docs.rs]
 default-target = "riscv32imc-unknown-none-elf"
 features       = ["nightly"]

esp-backtrace/Cargo.toml

@@ -4,6 +4,8 @@ version      = "0.14.2"
 edition      = "2021"
 rust-version = "1.76.0"
 description  = "Bare-metal backtrace support for Espressif devices"
+keywords     = ["backtrace", "embedded", "esp32", "espressif"]
+categories   = ["embedded", "hardware-support", "no-std"]
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
 

esp-hal-embassy/Cargo.toml

@@ -4,6 +4,8 @@ version      = "0.5.0"
 edition      = "2021"
 rust-version = "1.83.0"
 description  = "Embassy support for esp-hal"
+keywords     = ["async", "embedded", "esp32", "espressif"]
+categories   = ["asynchronous", "embedded", "hardware-support", "no-std"]
 repository   = "https://github.com/esp-rs/esp-hal"
 license      = "MIT OR Apache-2.0"
 

esp-hal/CHANGELOG.md

@@ -224,6 +224,8 @@ and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0
 - `parl_io::{no_clk_pin(), NoClkPin}` (#2531)
 - Removed `get_core` function in favour of `Cpu::current` (#2533)
 
+- Removed `uart::Config` setters and `symbol_length`. (#2847)
+
 ## [0.21.1]
 
 ### Fixed

esp-hal/Cargo.toml

@@ -5,6 +5,8 @@ edition       = "2021"
 rust-version  = "1.83.0"
 description   = "Bare-metal HAL for Espressif devices"
 documentation = "https://docs.esp-rs.org/esp-hal/"
+keywords      = ["embedded", "embedded-hal", "esp32", "espressif", "hal"]
+categories    = ["embedded", "hardware-support", "no-std"]
 repository    = "https://github.com/esp-rs/esp-hal"
 license       = "MIT OR Apache-2.0"
 links         = "esp-hal"

esp-hal/MIGRATING-0.22.md

@@ -199,7 +199,6 @@ is enabled. To retrieve the address and size of the initialized external memory,
 
 The usage of `esp_alloc::psram_allocator!` remains unchanged.
 
-
 ## embedded-hal 0.2.* is not supported anymore.
 
 As per https://github.com/rust-embedded/embedded-hal/pull/640, our driver no longer implements traits from `embedded-hal 0.2.x`.
@@ -344,6 +343,7 @@ The reexports that were previously part of the prelude are available through oth
 + uart0.set_at_cmd(AtCmdConfig::default().with_cmd_char(b'#'));
 ```
 
+
 ## Crate configuration changes
 
 To prevent ambiguity between configurations, we had to change the naming format of configuration
@@ -357,3 +357,16 @@ configurations to match the new format.
 -ESP_HAL_PLACE_SPI_DRIVER_IN_RAM="true"
 +ESP_HAL_CONFIG_PLACE_SPI_DRIVER_IN_RAM="true"
 ```
+
+## UART changes
+
+The `Config` struct's setters are now prefixed with `with_`. `parity_none`, `parity_even`,
+`parity_odd` have been replaced by `with_parity` that takes a `Parity` parameter.
+
+```diff
+ let config = Config::default()
+-    .rx_fifo_full_threshold(30)
++    .with_rx_fifo_full_threshold(30)
+-    .parity_even();
++    .with_parity(Parity::Even);
+```

esp-hal/src/gpio/lp_io.rs

@@ -42,6 +42,7 @@ pub struct LowPowerOutput<'d, const PIN: u8> {
 
 impl<'d, const PIN: u8> LowPowerOutput<'d, PIN> {
     /// Create a new output pin for use by the low-power core
+    #[instability::unstable] 
     pub fn new<P>(_pin: impl Peripheral<P = P> + 'd) -> Self
     where
         P: OutputPin + RtcPin,
@@ -77,6 +78,7 @@ pub struct LowPowerInput<'d, const PIN: u8> {
 
 impl<'d, const PIN: u8> LowPowerInput<'d, PIN> {
     /// Create a new input pin for use by the low-power core
+    #[instability::unstable] 
     pub fn new<P>(_pin: impl Peripheral<P = P> + 'd) -> Self
     where
         P: InputPin + RtcPin,
@@ -121,6 +123,7 @@ pub struct LowPowerOutputOpenDrain<'d, const PIN: u8> {
 
 impl<'d, const PIN: u8> LowPowerOutputOpenDrain<'d, PIN> {
     /// Create a new output pin for use by the low-power core
+    #[instability::unstable] 
     pub fn new<P>(_pin: impl Peripheral<P = P> + 'd) -> Self
     where
         P: InputPin + OutputPin + RtcPin,
@@ -191,7 +194,6 @@ pub(crate) fn init_low_power_pin(pin: u8) {
 }
 
 #[doc(hidden)]
-#[macro_export]
 macro_rules! lp_gpio {
     (
         $($gpionum:literal)+
@@ -262,3 +264,5 @@ macro_rules! lp_gpio {
         )+
     }
 }
+
+pub(crate) use lp_gpio;

esp-hal/src/gpio/mod.rs

@@ -86,11 +86,19 @@ mod placeholder;
 pub use placeholder::NoPin;
 
 #[cfg(soc_etm)]
-pub mod etm;
+crate::unstable_module! {
+    pub mod etm;
+}
+
 #[cfg(lp_io)]
-pub mod lp_io;
+crate::unstable_module! {
+    pub mod lp_io;
+}
+
 #[cfg(all(rtc_io, not(esp32)))]
-pub mod rtc_io;
+crate::unstable_module! {
+    pub mod rtc_io;
+}
 
 /// Convenience constant for `Option::None` pin
 static USER_INTERRUPT_HANDLER: CFnPtr = CFnPtr::new();
@@ -139,6 +147,7 @@ impl From<WakeEvent> for Event {
 }
 
 /// Event used to wake up from light sleep.
+#[instability::unstable]
 #[derive(Debug, Eq, PartialEq, Copy, Clone, Hash)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum WakeEvent {
@@ -233,6 +242,7 @@ pub enum DriveStrength {
 ///
 /// The different variants correspond to different functionality depending on
 /// the chip and the specific pin. For more information, refer to your chip's
+#[doc(hidden)]
 #[doc = crate::trm_markdown_link!("iomuxgpio")]
 #[derive(Debug, Eq, PartialEq, Copy, Clone, Hash)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
@@ -268,6 +278,7 @@ impl TryFrom<usize> for AlternateFunction {
 }
 
 /// RTC function
+#[instability::unstable]
 #[derive(Debug, Eq, PartialEq, Copy, Clone, Hash)]
 #[cfg_attr(feature = "defmt", derive(defmt::Format))]
 pub enum RtcFunction {
@@ -278,6 +289,7 @@ pub enum RtcFunction {
 }
 
 /// Trait implemented by RTC pins
+#[instability::unstable]
 pub trait RtcPin: Pin {
     /// RTC number of the pin
     #[cfg(xtensa)]
@@ -300,6 +312,7 @@ pub trait RtcPin: Pin {
 
 /// Trait implemented by RTC pins which supporting internal pull-up / pull-down
 /// resistors.
+#[instability::unstable]
 pub trait RtcPinWithResistors: RtcPin {
     /// Enable/disable the internal pull-up resistor
     fn rtcio_pullup(&mut self, enable: bool);
@@ -516,13 +529,16 @@ pub trait OutputPin: Pin + Into<AnyPin> + 'static {
 }
 
 /// Trait implemented by pins which can be used as analog pins
+#[instability::unstable]
 pub trait AnalogPin: Pin {
     /// Configure the pin for analog operation
     #[doc(hidden)]
     fn set_analog(&self, _: private::Internal);
 }
 
 /// Trait implemented by pins which can be used as Touchpad pins
+#[cfg(touch)]
+#[instability::unstable]
 pub trait TouchPin: Pin {
     /// Configure the pin for analog operation
     #[doc(hidden)]
@@ -1583,6 +1599,7 @@ where
     /// Enable as a wake-up source.
     ///
     /// This will unlisten for interrupts
+    #[instability::unstable]
     #[inline]
     pub fn wakeup_enable(&mut self, enable: bool, event: WakeEvent) {
         self.pin.wakeup_enable(enable, event);
@@ -1982,6 +1999,7 @@ where
     /// Enable as a wake-up source.
     ///
     /// This will unlisten for interrupts
+    #[instability::unstable]
     #[inline]
     pub fn wakeup_enable(&mut self, enable: bool, event: WakeEvent) {
         self.listen_with_options(event.into(), false, false, enable);

esp-hal/src/i2c/master/mod.rs

@@ -985,6 +985,7 @@ fn configure_clock(
 }
 
 /// Peripheral data describing a particular I2C instance.
+#[doc(hidden)]
 #[derive(Debug)]
 #[non_exhaustive]
 pub struct Info {
@@ -2188,13 +2189,15 @@ impl Driver<'_> {
 }
 
 /// Peripheral state for an I2C instance.
+#[doc(hidden)]
 #[non_exhaustive]
 pub struct State {
     /// Waker for the asynchronous operations.
     pub waker: AtomicWaker,
 }
 
 /// I2C Peripheral Instance
+#[doc(hidden)]
 pub trait Instance: Peripheral<P = Self> + Into<AnyI2c> + 'static {
     /// Returns the peripheral data and state describing this instance.
     fn parts(&self) -> (&Info, &State);

esp-hal/src/soc/esp32c6/gpio.rs

@@ -287,7 +287,7 @@ pub enum OutputSignal {
     GPIO                  = 128,
 }
 
-crate::lp_gpio! {
+crate::gpio::lp_io::lp_gpio! {
     0
     1
     2

esp-hal/src/spi/master.rs

@@ -2362,15 +2362,18 @@ mod ehal1 {
 }
 
 /// SPI peripheral instance.
+#[doc(hidden)]
 pub trait PeripheralInstance: private::Sealed + Into<AnySpi> + DmaEligible + 'static {
     /// Returns the peripheral data describing this SPI instance.
     fn info(&self) -> &'static Info;
 }
 
 /// Marker trait for QSPI-capable SPI peripherals.
+#[doc(hidden)]
 pub trait QspiInstance: PeripheralInstance {}
 
 /// Peripheral data describing a particular SPI instance.
+#[doc(hidden)]
 #[non_exhaustive]
 pub struct Info {
     /// Pointer to the register block for this SPI instance.

esp-hal/src/spi/slave.rs

@@ -602,6 +602,7 @@ impl InstanceDma for crate::peripherals::SPI2 {}
 impl InstanceDma for crate::peripherals::SPI3 {}
 
 /// Peripheral data describing a particular SPI instance.
+#[doc(hidden)]
 #[non_exhaustive]
 #[doc(hidden)]
 pub struct Info {

esp-hal/src/trace.rs

@@ -207,6 +207,7 @@ where
 }
 
 /// Trace peripheral instance
+#[doc(hidden)]
 pub trait Instance: crate::private::Sealed {
     /// Get a reference to the peripheral's underlying register block
     fn register_block(&self) -> &RegisterBlock;

esp-hal/src/twai/mod.rs

@@ -1360,6 +1360,7 @@ where
 }
 
 /// TWAI peripheral instance.
+#[doc(hidden)]
 pub trait Instance: Peripheral<P = Self> + Into<AnyTwai> + 'static {
     /// The identifier number for this TWAI instance.
     fn number(&self) -> usize;