Merge pull request riscv-collab#955 from MarekVCodasip/use-watchpoint…

…-mask-macro target/riscv: Replace watchpoint value mask comparison value with macro. Change-Id: I6767a2b9709b5dd13f96cc3fdb44052d75ceb585 Signed-off-by: Evgeniy Naydanov <[email protected]>
en-sc · Nov 10, 2023 · b6217f1 · b6217f1
2 parents f119c1d + 2357237
commit b6217f1
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Showing 2 changed files with 7 additions and 10 deletions.
diff --git a/src/target/riscv/riscv-013.c b/src/target/riscv/riscv-013.c
@@ -2114,11 +2114,11 @@ static int examine(struct target *target)
 		if (set_group(target, &info->haltgroup_supported, target->smp, HALT_GROUP) != ERROR_OK)
 			return ERROR_FAIL;
 		if (info->haltgroup_supported)
-			LOG_TARGET_INFO(target, "Core %d made part of halt group %d.", target->coreid,
+			LOG_TARGET_INFO(target, "Core %d made part of halt group %d.", info->index,
 					target->smp);
 		else
 			LOG_TARGET_INFO(target, "Core %d could not be made part of halt group %d.",
-					target->coreid, target->smp);
+					info->index, target->smp);
 	}
 
 	/* Some regression suites rely on seeing 'Examined RISC-V core' to know
@@ -4742,7 +4742,7 @@ static int select_prepped_harts(struct target *target)
 		struct riscv_info *info = riscv_info(t);
 		riscv013_info_t *info_013 = get_info(t);
 		unsigned int index = info_013->index;
-		LOG_TARGET_DEBUG(target, "index=%d, coreid=%d, prepped=%d", index, t->coreid, info->prepped);
+		LOG_TARGET_DEBUG(target, "index=%d, prepped=%d", index, info->prepped);
 		if (info->prepped) {
 			info_013->selected = true;
 			hawindow[index / 32] |= 1 << (index % 32);
@@ -4913,7 +4913,7 @@ static enum riscv_halt_reason riscv013_halt_reason(struct target *target)
 		 * already set when we connected. Force enumeration now, which has the
 		 * side effect of clearing any triggers we did not set. */
 		riscv_enumerate_triggers(target);
-		LOG_TARGET_DEBUG(target, "Coreid: [%d] halted because of trigger", target->coreid);
+		LOG_TARGET_DEBUG(target, "halted because of trigger");
 		return RISCV_HALT_TRIGGER;
 	case CSR_DCSR_CAUSE_STEP:
 		return RISCV_HALT_SINGLESTEP;

diff --git a/src/target/riscv/riscv.c b/src/target/riscv/riscv.c
@@ -1375,10 +1375,7 @@ static void trigger_from_watchpoint(struct trigger *trigger,
 
 int riscv_add_watchpoint(struct target *target, struct watchpoint *watchpoint)
 {
-	// NOTE: typeof is needed because of upstream OpenOCD bug. This should be
-	// replaced by WATCHPOINT_IGNORE_DATA_VALUE_MASK once it is available
-	// See: https://review.openocd.org/c/openocd/+/7840
-	if (watchpoint->mask != ~(typeof(watchpoint->mask))0) {
+	if (watchpoint->mask != WATCHPOINT_IGNORE_DATA_VALUE_MASK) {
 		LOG_TARGET_ERROR(target, "Watchpoints on data values are not implemented");
 		return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
 	}
@@ -1834,7 +1831,7 @@ int riscv_halt(struct target *target)
 
 static int riscv_assert_reset(struct target *target)
 {
-	LOG_TARGET_DEBUG(target, "coreid: [%d]", target->coreid);
+	LOG_TARGET_DEBUG(target, "");
 	struct target_type *tt = get_target_type(target);
 	if (!tt)
 		return ERROR_FAIL;
@@ -1844,7 +1841,7 @@ static int riscv_assert_reset(struct target *target)
 
 static int riscv_deassert_reset(struct target *target)
 {
-	LOG_TARGET_DEBUG(target, "coreid: [%d]", target->coreid);
+	LOG_TARGET_DEBUG(target, "");
 	struct target_type *tt = get_target_type(target);
 	if (!tt)
 		return ERROR_FAIL;