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Deduplicate more stuff.
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Dirbaio committed Aug 11, 2024
1 parent e15d3d9 commit a7f42d2
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Showing 123 changed files with 2,785 additions and 44,362 deletions.
18 changes: 9 additions & 9 deletions src/rp2040/adc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,47 +17,47 @@ impl Adc {
#[doc = "ADC Control and Status"]
#[inline(always)]
pub const fn cs(self) -> crate::common::Reg<regs::Cs, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
}
#[doc = "Result of most recent ADC conversion"]
#[inline(always)]
pub const fn result(self) -> crate::common::Reg<regs::Result, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(4usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
}
#[doc = "FIFO control and status"]
#[inline(always)]
pub const fn fcs(self) -> crate::common::Reg<regs::Fcs, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(8usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize) as _) }
}
#[doc = "Conversion result FIFO"]
#[inline(always)]
pub const fn fifo(self) -> crate::common::Reg<regs::Fifo, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(12usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize) as _) }
}
#[doc = "Clock divider. If non-zero, CS_START_MANY will start conversions at regular intervals rather than back-to-back. The divider is reset when either of these fields are written. Total period is 1 + INT + FRAC / 256"]
#[inline(always)]
pub const fn div(self) -> crate::common::Reg<regs::Div, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(16usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x10usize) as _) }
}
#[doc = "Raw Interrupts"]
#[inline(always)]
pub const fn intr(self) -> crate::common::Reg<regs::Int, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(20usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x14usize) as _) }
}
#[doc = "Interrupt Enable"]
#[inline(always)]
pub const fn inte(self) -> crate::common::Reg<regs::Int, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(24usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x18usize) as _) }
}
#[doc = "Interrupt Force"]
#[inline(always)]
pub const fn intf(self) -> crate::common::Reg<regs::Int, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(28usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x1cusize) as _) }
}
#[doc = "Interrupt status after masking & forcing"]
#[inline(always)]
pub const fn ints(self) -> crate::common::Reg<regs::Int, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(32usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x20usize) as _) }
}
}
pub mod regs;
8 changes: 4 additions & 4 deletions src/rp2040/busctrl.rs
Original file line number Diff line number Diff line change
Expand Up @@ -17,26 +17,26 @@ impl Busctrl {
#[doc = "Set the priority of each master for bus arbitration."]
#[inline(always)]
pub const fn bus_priority(self) -> crate::common::Reg<regs::BusPriority, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0usize) as _) }
}
#[doc = "Bus priority acknowledge"]
#[inline(always)]
pub const fn bus_priority_ack(
self,
) -> crate::common::Reg<regs::BusPriorityAck, crate::common::RW> {
unsafe { crate::common::Reg::from_ptr(self.ptr.add(4usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x04usize) as _) }
}
#[doc = "Bus fabric performance counter 0"]
#[inline(always)]
pub const fn perfctr(self, n: usize) -> crate::common::Reg<regs::Perfctr, crate::common::RW> {
assert!(n < 4usize);
unsafe { crate::common::Reg::from_ptr(self.ptr.add(8usize + n * 8usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x08usize + n * 8usize) as _) }
}
#[doc = "Bus fabric performance event select for PERFCTR0"]
#[inline(always)]
pub const fn perfsel(self, n: usize) -> crate::common::Reg<regs::Perfsel, crate::common::RW> {
assert!(n < 4usize);
unsafe { crate::common::Reg::from_ptr(self.ptr.add(12usize + n * 8usize) as _) }
unsafe { crate::common::Reg::from_ptr(self.ptr.add(0x0cusize + n * 8usize) as _) }
}
}
pub mod regs;
Expand Down
12 changes: 6 additions & 6 deletions src/rp2040/busctrl/regs.rs
Original file line number Diff line number Diff line change
Expand Up @@ -77,18 +77,18 @@ impl Default for BusPriorityAck {
BusPriorityAck(0)
}
}
#[doc = "Bus fabric performance counter 1"]
#[doc = "Bus fabric performance counter 2"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Perfctr(pub u32);
impl Perfctr {
#[doc = "Busfabric saturating performance counter 1 Count some event signal from the busfabric arbiters. Write any value to clear. Select an event to count using PERFSEL1"]
#[doc = "Busfabric saturating performance counter 2 Count some event signal from the busfabric arbiters. Write any value to clear. Select an event to count using PERFSEL2"]
#[inline(always)]
pub const fn perfctr(&self) -> u32 {
let val = (self.0 >> 0usize) & 0x00ff_ffff;
val as u32
}
#[doc = "Busfabric saturating performance counter 1 Count some event signal from the busfabric arbiters. Write any value to clear. Select an event to count using PERFSEL1"]
#[doc = "Busfabric saturating performance counter 2 Count some event signal from the busfabric arbiters. Write any value to clear. Select an event to count using PERFSEL2"]
#[inline(always)]
pub fn set_perfctr(&mut self, val: u32) {
self.0 = (self.0 & !(0x00ff_ffff << 0usize)) | (((val as u32) & 0x00ff_ffff) << 0usize);
Expand All @@ -100,18 +100,18 @@ impl Default for Perfctr {
Perfctr(0)
}
}
#[doc = "Bus fabric performance event select for PERFCTR1"]
#[doc = "Bus fabric performance event select for PERFCTR0"]
#[repr(transparent)]
#[derive(Copy, Clone, Eq, PartialEq)]
pub struct Perfsel(pub u32);
impl Perfsel {
#[doc = "Select an event for PERFCTR1. Count either contested accesses, or all accesses, on a downstream port of the main crossbar."]
#[doc = "Select an event for PERFCTR0. Count either contested accesses, or all accesses, on a downstream port of the main crossbar."]
#[inline(always)]
pub const fn perfsel(&self) -> super::vals::Perfsel {
let val = (self.0 >> 0usize) & 0x1f;
super::vals::Perfsel::from_bits(val as u8)
}
#[doc = "Select an event for PERFCTR1. Count either contested accesses, or all accesses, on a downstream port of the main crossbar."]
#[doc = "Select an event for PERFCTR0. Count either contested accesses, or all accesses, on a downstream port of the main crossbar."]
#[inline(always)]
pub fn set_perfsel(&mut self, val: super::vals::Perfsel) {
self.0 = (self.0 & !(0x1f << 0usize)) | (((val.to_bits() as u32) & 0x1f) << 0usize);
Expand Down
2 changes: 1 addition & 1 deletion src/rp2040/busctrl/vals.rs
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
#[repr(u8)]
#[derive(Copy, Clone, Eq, PartialEq, Ord, PartialOrd)]
pub enum Perfsel {
APB_CONTESTED = 0,
APB_CONTESTED = 0x0,
APB = 0x01,
FASTPERI_CONTESTED = 0x02,
FASTPERI = 0x03,
Expand Down
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