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stm32/rtc: cleanup and fixes #1949

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merged 3 commits into from
Sep 25, 2023
Merged

stm32/rtc: cleanup and fixes #1949

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04b09a2
stm32/rtc: use rccperi enable
xoviat Sep 25, 2023
dc400a0
stm32/rtc: always set wakeup alarm
xoviat Sep 25, 2023
96edbd8
rtc: use enable on known working chips only
xoviat Sep 25, 2023
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4 changes: 2 additions & 2 deletions embassy-stm32/Cargo.toml
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Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,7 @@ sdio-host = "0.5.0"
embedded-sdmmc = { git = "https://github.com/embassy-rs/embedded-sdmmc-rs", rev = "a4f293d3a6f72158385f79c98634cb8a14d0d2fc", optional = true }
critical-section = "1.1"
atomic-polyfill = "1.0.1"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-74025d56c0ba061703f360558ce80f51d1165060" }
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-1551a1c01a993bb5ffc603311f80097c14e03f85" }
vcell = "0.1.3"
bxcan = "0.7.0"
nb = "1.0.0"
Expand All @@ -78,7 +78,7 @@ critical-section = { version = "1.1", features = ["std"] }
[build-dependencies]
proc-macro2 = "1.0.36"
quote = "1.0.15"
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-74025d56c0ba061703f360558ce80f51d1165060", default-features = false, features = ["metadata"]}
stm32-metapac = { git = "https://github.com/embassy-rs/stm32-data-generated", tag = "stm32-data-1551a1c01a993bb5ffc603311f80097c14e03f85", default-features = false, features = ["metadata"]}

[features]
default = ["rt"]
Expand Down
5 changes: 0 additions & 5 deletions embassy-stm32/src/rcc/bd.rs
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Expand Up @@ -88,11 +88,6 @@ impl BackupDomain {
))]
#[allow(dead_code, unused_variables)]
pub fn configure_ls(clock_source: RtcClockSource, lsi: bool, lse: Option<LseDrive>) {
if lsi || lse.is_some() {
use crate::rtc::sealed::Instance;
crate::peripherals::RTC::enable_peripheral_clk();
}

if lsi {
#[cfg(rtc_v3u5)]
let csr = crate::pac::RCC.bdcr();
Expand Down
10 changes: 7 additions & 3 deletions embassy-stm32/src/rtc/mod.rs
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Expand Up @@ -111,11 +111,12 @@ impl RtcTimeProvider {
}
}

#[non_exhaustive]
/// RTC Abstraction
pub struct Rtc {
#[cfg(feature = "low-power")]
stop_time: Mutex<CriticalSectionRawMutex, Cell<Option<RtcInstant>>>,
#[cfg(not(feature = "low-power"))]
_private: (),
}

#[non_exhaustive]
Expand Down Expand Up @@ -154,9 +155,14 @@ impl Default for RtcCalibrationCyclePeriod {

impl Rtc {
pub fn new(_rtc: impl Peripheral<P = RTC>, rtc_config: RtcConfig) -> Self {
#[cfg(any(rcc_wle, rcc_wl5, rcc_g4, rcc_g0, rtc_v2l4, rtc_v2wb))]
<RTC as crate::rcc::sealed::RccPeripheral>::enable();

let mut this = Self {
#[cfg(feature = "low-power")]
stop_time: Mutex::const_new(CriticalSectionRawMutex::new(), Cell::new(None)),
#[cfg(not(feature = "low-power"))]
_private: (),
};

let frequency = Self::frequency();
Expand Down Expand Up @@ -292,8 +298,6 @@ pub(crate) mod sealed {
crate::pac::RTC
}

fn enable_peripheral_clk();

/// Read content of the backup register.
///
/// The registers retain their values during wakes from standby mode or system resets. They also
Expand Down
20 changes: 0 additions & 20 deletions embassy-stm32/src/rtc/v2.rs
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Expand Up @@ -75,15 +75,6 @@ impl super::Rtc {
#[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
unsafe { crate::rcc::get_freqs() }.rtc.unwrap();

/*
If the requested duration is u64::MAX, don't even set the alarm

Otherwise clamp the requested duration to u32::MAX so that we can do math
*/
if requested_duration.as_ticks() == u64::MAX {
return;
}

let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64);
let rtc_hz = Self::frequency().0 as u64;
let rtc_ticks = requested_duration * rtc_hz / TICK_HZ;
Expand Down Expand Up @@ -286,17 +277,6 @@ impl sealed::Instance for crate::peripherals::RTC {
#[cfg(all(feature = "low-power", stm32l0))]
type WakeupInterrupt = crate::interrupt::typelevel::RTC;

fn enable_peripheral_clk() {
#[cfg(any(rtc_v2l4, rtc_v2wb))]
{
// enable peripheral clock for communication
crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));

// read to allow the pwr clock to enable
crate::pac::PWR.cr1().read();
}
}

fn read_backup_register(rtc: &Rtc, register: usize) -> Option<u32> {
if register < Self::BACKUP_REGISTER_COUNT {
Some(rtc.bkpr(register).read().bkp())
Expand Down
17 changes: 0 additions & 17 deletions embassy-stm32/src/rtc/v3.rs
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Original file line number Diff line number Diff line change
Expand Up @@ -128,23 +128,6 @@ impl super::Rtc {
impl sealed::Instance for crate::peripherals::RTC {
const BACKUP_REGISTER_COUNT: usize = 32;

fn enable_peripheral_clk() {
#[cfg(any(rcc_wle, rcc_wl5, rcc_g4))]
{
// enable peripheral clock for communication
crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
}

#[cfg(rcc_g0)]
{
// enable peripheral clock for communication
crate::pac::RCC.apbenr1().modify(|w| w.set_rtcapben(true));
}

// read to allow the pwr clock to enable
crate::pac::PWR.cr1().read();
}

fn read_backup_register(_rtc: &Rtc, register: usize) -> Option<u32> {
#[allow(clippy::if_same_then_else)]
if register < Self::BACKUP_REGISTER_COUNT {
Expand Down