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stm32: bd #1941

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29 changes: 27 additions & 2 deletions embassy-stm32/src/rcc/bd.rs
Original file line number Diff line number Diff line change
Expand Up @@ -82,15 +82,40 @@ impl BackupDomain {
r
}

#[allow(dead_code, unused_variables)]
fn enable_peripheral_clk() {
#[cfg(any(rtc_v2l4, rtc_v2wb))]
{
crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
crate::pac::PWR.cr1().read();
}
#[cfg(any(rtc_v2f2))]
{
crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true));
crate::pac::PWR.cr().read();
}

#[cfg(any(rtc_v2f0, rtc_v2l0))]
crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true));

#[cfg(any(rcc_wle, rcc_wl5, rcc_g4))]
crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));

#[cfg(rcc_g0)]
crate::pac::RCC.apbenr1().modify(|w| w.set_rtcapben(true));

#[cfg(any(rtc_v3, rtc_v3u5))]
crate::pac::PWR.cr1().read();
}

#[cfg(any(
rtc_v2f0, rtc_v2f2, rtc_v2f3, rtc_v2f4, rtc_v2f7, rtc_v2h7, rtc_v2l0, rtc_v2l1, rtc_v2l4, rtc_v2wb, rtc_v3,
rtc_v3u5
))]
#[allow(dead_code, unused_variables)]
pub fn configure_ls(clock_source: RtcClockSource, lsi: bool, lse: Option<LseDrive>) {
if lsi || lse.is_some() {
use crate::rtc::sealed::Instance;
crate::peripherals::RTC::enable_peripheral_clk();
Self::enable_peripheral_clk();
}

if lsi {
Expand Down
2 changes: 0 additions & 2 deletions embassy-stm32/src/rtc/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -292,8 +292,6 @@ pub(crate) mod sealed {
crate::pac::RTC
}

fn enable_peripheral_clk();

/// Read content of the backup register.
///
/// The registers retain their values during wakes from standby mode or system resets. They also
Expand Down
35 changes: 1 addition & 34 deletions embassy-stm32/src/rtc/v2.rs
Original file line number Diff line number Diff line change
Expand Up @@ -75,15 +75,7 @@ impl super::Rtc {
#[cfg(any(rcc_wb, rcc_f4, rcc_f410))]
unsafe { crate::rcc::get_freqs() }.rtc.unwrap();

/*
If the requested duration is u64::MAX, don't even set the alarm

Otherwise clamp the requested duration to u32::MAX so that we can do math
*/
if requested_duration.as_ticks() == u64::MAX {
return;
}

// Clamp requested_duration to prevent an overflow
let requested_duration = requested_duration.as_ticks().clamp(0, u32::MAX as u64);
let rtc_hz = Self::frequency().0 as u64;
let rtc_ticks = requested_duration * rtc_hz / TICK_HZ;
Expand Down Expand Up @@ -286,31 +278,6 @@ impl sealed::Instance for crate::peripherals::RTC {
#[cfg(all(feature = "low-power", stm32l0))]
type WakeupInterrupt = crate::interrupt::typelevel::RTC;

fn enable_peripheral_clk() {
#[cfg(any(rtc_v2l4, rtc_v2wb))]
{
// enable peripheral clock for communication
crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));

// read to allow the pwr clock to enable
crate::pac::PWR.cr1().read();
}
#[cfg(any(rtc_v2f2))]
{
// enable peripheral clock for communication
crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true));

// read to allow the pwr clock to enable
crate::pac::PWR.cr().read();
}

#[cfg(any(rtc_v2f0, rtc_v2l0))]
{
// enable peripheral clock for communication
crate::pac::RCC.apb1enr().modify(|w| w.set_pwren(true));
}
}

fn read_backup_register(rtc: &Rtc, register: usize) -> Option<u32> {
if register < Self::BACKUP_REGISTER_COUNT {
Some(rtc.bkpr(register).read().bkp())
Expand Down
17 changes: 0 additions & 17 deletions embassy-stm32/src/rtc/v3.rs
Original file line number Diff line number Diff line change
Expand Up @@ -128,23 +128,6 @@ impl super::Rtc {
impl sealed::Instance for crate::peripherals::RTC {
const BACKUP_REGISTER_COUNT: usize = 32;

fn enable_peripheral_clk() {
#[cfg(any(rcc_wle, rcc_wl5, rcc_g4))]
{
// enable peripheral clock for communication
crate::pac::RCC.apb1enr1().modify(|w| w.set_rtcapben(true));
}

#[cfg(rcc_g0)]
{
// enable peripheral clock for communication
crate::pac::RCC.apbenr1().modify(|w| w.set_rtcapben(true));
}

// read to allow the pwr clock to enable
crate::pac::PWR.cr1().read();
}

fn read_backup_register(_rtc: &Rtc, register: usize) -> Option<u32> {
#[allow(clippy::if_same_then_else)]
if register < Self::BACKUP_REGISTER_COUNT {
Expand Down