updated patents

e-lab · Nov 8, 2022 · 3aa78be · 3aa78be
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@@ -326,20 +326,33 @@ <h3 id="theses-and-reports">Theses and Reports</h3>
             <hr>
             <h3 id="periodicals">Periodicals</h3>
             <p><strong>A distributed network for visual processing</strong>, Culurciello, E., Andreou A.G., Mandolesi P., Neuromorphic Engineer Newsletter. Volume 1, Number 2, Autumn 2004.</p>
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             <hr>
             <h3 id="patents-from-our-work-">Patents from our work:</h3>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;p=1&amp;u=%2Fnetahtml%2FPTO%2Fsearch-bool.html&amp;r=1&amp;f=G&amp;l=50&amp;co1=AND&amp;d=PTXT&amp;s1=9858220.PN.&amp;OS=PN/9858220&amp;RS=PN/9858220"><strong>Computing architecture with concurrent programmable data co-processor</strong></a>
-            Culurciello ,   et al.    January 2, 2018, United States Patent    9,858,220</p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=1&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">8,571,093</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=1&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Communication interface for galvanic isolation</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=2&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">8,508,372</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=2&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Method and system for fall detection</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=3&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">8,373,454</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=3&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Power stage</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=4&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">8,284,823</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=4&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Serial data communication system and method</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=5&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">8,179,296</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=5&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Digital readout method and apparatus</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=6&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">8,138,813</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=6&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Interface circuit</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=7&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">7,990,451</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=7&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Optical pixel and image sensor</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=8&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">7,512,861</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=8&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Method for determining identity of simultaneous events and applications to image sensing and A/D conversion</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=9&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">7,474,345</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=9&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">System and method to facilitate time domain sampling for solid state imager</a></p>
-            <p><a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=10&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">7,071,982</a> <a href="http://patft.uspto.gov/netacgi/nph-Parser?Sect1=PTO2&amp;Sect2=HITOFF&amp;u=%2Fnetahtml%2FPTO%2Fsearch-adv.htm&amp;r=10&amp;p=1&amp;f=G&amp;l=50&amp;d=PTXT&amp;S1=culurciello&amp;OS=culurciello&amp;RS=culurciello">Adaptive relative and absolute address coding CMOS imager technique and system architecture</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/60/e0/b9/55accfe12a495a/WO2022132558A1.pdf">Evolutionary imitation learning</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/69/8a/d1/915e33e4ede966/US20220147809A1.pdf">Deep learning accelerators with configurable hardware options optimizable via…</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/2c/35/63/4443c8ce22ec63/US20220147813A1.pdf">Runtime optimization of computations of an artificial neural network compiled …</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/c8/b5/18/42dea9c5509429/US20220147811A1.pdf">Implement the computation of an artificial neural network using multiple deep …</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/50/bc/31/712a000e4886fd/US20220147810A1.pdf">Discovery of hardware characteristics of deep learning accelerators for …</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/61/b8/27/52dbb5c75346e5/WO2022098495A1.pdf">Compiler configurable to generate instructions executable by different deep …</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/43/09/ba/9ca937e089e6ca/WO2022046051A1.pdf">Deep neural networks compiler for a trace-based accelerator</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/a9/ae/5d/50c59e2936bd56/WO2022098498A1.pdf">Compiler with an artificial neural network to optimize instructions generated …</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/27/03/ae/19b7dd8e853450/US20210303358A1.pdf">Inference Engine Circuit Architecture</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/65/f0/56/f1f243e9ad7546/US20180341495A1.pdf">Hardware Accelerator for Convolutional Neural Networks and Method of Operation …</a></p>
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+            <p><a href="https://patentimages.storage.googleapis.com/a8/6d/89/fa949847c75ce9/US10157156.pdf">Computing architecture with co-processor</a></p>
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             <hr>
             <p>The publications in this page are owned by the respective publishers. Preprints of these papers are provided to assist timely dissemination of their contents. Copyrights are held by the respective publishing organizations.</p>