Skip to content

Commit

Permalink
Initial create circuits (#1)
Browse files Browse the repository at this point in the history
* Arrangement of elements

* paths

* Do not track production files

* Most paths

* Rearrange elements

* Create new PCB paths

* Add footprints

* Create ESP32 adapter

* Add custom footprints (lib)

* Finish analog part
  • Loading branch information
donarturo11 authored Sep 20, 2023
1 parent 7dd95e5 commit 42ad0b8
Show file tree
Hide file tree
Showing 11 changed files with 92,945 additions and 654 deletions.
3 changes: 2 additions & 1 deletion hardware/.gitignore
Original file line number Diff line number Diff line change
@@ -1 +1,2 @@
dsbi-backups/
dsbi-backups/
*.pdf
264 changes: 264 additions & 0 deletions hardware/ESP32_module.pretty/ESP32-WROOM-SOCKET.kicad_mod

Large diffs are not rendered by default.

66 changes: 66 additions & 0 deletions hardware/PIN.pretty/FanPinHeader_1x04_P2.54mm_Vertical.kicad_mod
Original file line number Diff line number Diff line change
@@ -0,0 +1,66 @@
(footprint "FanPinHeader_1x04_P2.54mm_Vertical" (version 20221018) (generator pcbnew)
(layer "F.Cu")
(descr "3-pin CPU fan Through hole pin header, see http://www.formfactors.org/developer%5Cspecs%5Crev1_2_public.pdf")
(tags "pin header 3-pin CPU fan")
(property "Sheetfile" "eegAmp.kicad_sch")
(property "Sheetname" "")
(property "ki_description" "Generic connector, single row, 01x03, script generated")
(property "ki_keywords" "connector")
(attr through_hole)
(fp_text reference "J2" (at 2.5 -3.4 -180) (layer "F.SilkS")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp 57d5b2b1-9c24-4fbf-9f08-2ea7f1264f5a)
)
(fp_text value "~" (at 2.55 4.5 -180) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp c64fdbad-7c15-4e0f-b6f0-ada3225cf264)
)
(fp_text user "${REFERENCE}" (at 2.45 1.8 -180) (layer "F.Fab")
(effects (font (size 1 1) (thickness 0.15)))
(tstamp c6616667-5975-49f8-92e2-fafc0f88a522)
)
(fp_line (start -1.35 -2.65) (end 6.45 -2.65)
(stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp 52f6b9bc-5951-46f7-99f1-c9cede2b4475))
(fp_line (start -1.35 3.4) (end -1.35 -2.65)
(stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp ffaf8430-93a7-4939-a0ef-da2d72a84d73))
(fp_line (start 0 2.29) (end 5.08 2.29)
(stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp 1d063e99-381a-4816-83dd-0b4149cbc1c6))
(fp_line (start 0 3.3) (end 0 2.29)
(stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp 8b1fc654-fc01-4bc3-b38f-479032a94f5e))
(fp_line (start 5.08 2.29) (end 5.08 3.3)
(stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp dda3ed0c-1ca4-4f24-8c0b-f0be3d4df8ee))
(fp_line (start 6.45 -2.65) (end 6.45 3.4)
(stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp 1cbd8c49-ea0a-47a7-bd40-0f4fb997bc21))
(fp_line (start 6.45 3.4) (end -1.35 3.4)
(stroke (width 0.25) (type solid)) (layer "F.SilkS") (tstamp dccfd64b-a277-4c61-85f7-00e9b5c0a147))
(fp_line (start -1.75 3.8) (end -1.75 -3.05)
(stroke (width 0.25) (type solid)) (layer "F.CrtYd") (tstamp 90adf586-98fb-44d0-915b-bbb55878696b))
(fp_line (start -1.75 3.8) (end 6.85 3.8)
(stroke (width 0.25) (type solid)) (layer "F.CrtYd") (tstamp 1219b5c5-c2f2-48ec-b459-4cdf9035ddd9))
(fp_line (start 6.85 -3.05) (end -1.75 -3.05)
(stroke (width 0.25) (type solid)) (layer "F.CrtYd") (tstamp 331a4c35-f0b3-4849-a102-c738e966539f))
(fp_line (start 6.85 -3.05) (end 6.85 3.8)
(stroke (width 0.25) (type solid)) (layer "F.CrtYd") (tstamp 23bc527f-74e3-4be7-9f8f-23f5843dbf08))
(fp_line (start -1.25 -2.55) (end 6.35 -2.55)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 7684fa5c-ed6e-4f98-893b-58d9db0bc241))
(fp_line (start -1.25 3.3) (end -1.25 -2.55)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 6089edd3-d11c-4b33-b00c-afbace491140))
(fp_line (start 0 2.3) (end 0 3.3)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp d885e3a2-9fe0-41bb-ac90-449d7e6505c3))
(fp_line (start 5.05 2.3) (end 0 2.3)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 431c11f3-d36f-44e0-8e4a-45966c9973e4))
(fp_line (start 5.05 3.3) (end 5.05 2.3)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp ead2532b-13bd-4916-81aa-914ed6849dfa))
(fp_line (start 6.35 -2.55) (end 6.35 3.3)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp b4424f7d-c1da-49b8-b411-cde80849d19c))
(fp_line (start 6.35 3.3) (end -1.25 3.3)
(stroke (width 0.1) (type solid)) (layer "F.Fab") (tstamp 50c26233-9627-4ced-a459-2e29bb8d36a6))
(pad "1" thru_hole rect (at 0 0 90) (size 2.03 1.73) (drill 0.3) (layers "*.Cu" "*.Mask") (tstamp 900acb94-368a-4ada-84ce-2f79a126b442))
(pad "2" thru_hole oval (at 2.54 0 90) (size 2.03 1.73) (drill 0.3) (layers "*.Cu" "*.Mask") (tstamp 0cbedbc7-b98c-46e3-b3cb-b5d8aed1c94d))
(pad "3" thru_hole oval (at 5.08 0 90) (size 2.03 1.73) (drill 0.3) (layers "*.Cu" "*.Mask") (tstamp 9f92437e-bc81-4629-afe8-5e1eaf20db92))
(model "${KICAD6_3DMODEL_DIR}/Connector.3dshapes/FanPinHeader_1x03_P2.54mm_Vertical.wrl"
(offset (xyz 0 0 0))
(scale (xyz 1 1 1))
(rotate (xyz 0 0 0))
)
)
634 changes: 634 additions & 0 deletions hardware/dsbi-digital-part.kicad_pcb

Large diffs are not rendered by default.

77 changes: 77 additions & 0 deletions hardware/dsbi-digital-part.kicad_prl
Original file line number Diff line number Diff line change
@@ -0,0 +1,77 @@
{
"board": {
"active_layer": 37,
"active_layer_preset": "All Layers",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": false,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
0,
1,
2,
3,
4,
5,
8,
9,
10,
11,
12,
13,
15,
16,
17,
18,
19,
20,
21,
22,
23,
24,
25,
26,
27,
28,
29,
30,
32,
33,
34,
35,
36,
39,
40
],
"visible_layers": "fffffff_ffffffff",
"zone_display_mode": 0
},
"meta": {
"filename": "dsbi-digital-part.kicad_prl",
"version": 3
},
"project": {
"files": []
}
}
229 changes: 229 additions & 0 deletions hardware/dsbi-digital-part.kicad_pro
Original file line number Diff line number Diff line change
@@ -0,0 +1,229 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"board_outline_line_width": 0.049999999999999996,
"copper_line_width": 0.19999999999999998,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.049999999999999996,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": false,
"text_position": 0,
"units_format": 1
},
"fab_line_width": 0.09999999999999999,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.09999999999999999,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.3,
"height": 1.73,
"width": 2.03
},
"silk_line_width": 0.09999999999999999,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.09999999999999999,
"silk_text_upright": false,
"zones": {
"min_clearance": 0.5
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_near_hole": "error",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_dangling": "warning",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": {
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.19999999999999998,
"min_microvia_drill": 0.09999999999999999,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.7999999999999999,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.0,
"min_via_annular_width": 0.09999999999999999,
"min_via_diameter": 0.5,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 5,
"td_on_pad_in_zone": false,
"td_onpadsmd": true,
"td_onroundshapesonly": false,
"td_ontrackend": false,
"td_onviapad": true
}
],
"teardrop_parameters": [
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"via_dimensions": [],
"zones_allow_external_fillets": false
},
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"libraries": {
"pinned_footprint_libs": [],
"pinned_symbol_libs": []
},
"meta": {
"filename": "dsbi-digital-part.kicad_pro",
"version": 1
},
"net_settings": {
"classes": [
{
"bus_width": 12,
"clearance": 0.2,
"diff_pair_gap": 0.25,
"diff_pair_via_gap": 0.25,
"diff_pair_width": 0.2,
"line_style": 0,
"microvia_diameter": 0.3,
"microvia_drill": 0.1,
"name": "Default",
"pcb_color": "rgba(0, 0, 0, 0.000)",
"schematic_color": "rgba(0, 0, 0, 0.000)",
"track_width": 0.2,
"via_diameter": 0.6,
"via_drill": 0.3,
"wire_width": 6
}
],
"meta": {
"version": 3
},
"net_colors": null,
"netclass_assignments": null,
"netclass_patterns": []
},
"pcbnew": {
"last_paths": {
"gencad": "",
"idf": "",
"netlist": "",
"specctra_dsn": "",
"step": "",
"vrml": ""
},
"page_layout_descr_file": ""
},
"schematic": {
"legacy_lib_dir": "",
"legacy_lib_list": []
},
"sheets": [],
"text_variables": {}
}
Loading

0 comments on commit 42ad0b8

Please sign in to comment.