02. Architecture and ISA details

Architecture details

In this section I will list some of the main components of the RC16 CPU, providing some implementation details for each one of those.

CPU addressable registers

Register name	Register address	Input	Output	Description
R0 - R7	0x0 - 0x7	yes	yes	General purpose registers
A	0x8	no	yes	ALU first operand
B	0x9	no	yes	ALU second operand
OUT	0xA	yes	no	ALU output
MAR	0xB	no	yes	Memory Address Register
OR	0xC	no	yes	Output Register (used for printing results)
JR	0xD	MOV only	no	Jump Register (special, used for jumps)

Note: R5=SP (stack pointer), R6=LR (link register), R7=PC (program counter).

ALU operation codes

Operation	Code
ADD	0x0
AND	0x1
OR	0x2
XOR	0x3
NOT	0x4
LSL	0x5
LSR	0x6
ASR	0x7

ALU flags

Name	Description
V	Overflow
C	Carry
Z	Zero
S	Sign (negative if set)

Operation conditionals

Condition name	Condition code	Flags	Description
AL	0x0	-	Always
EQ	0x1	Z	Equal
NE	0x2	¬Z	Not equal
LT	0x3	S	Less than
LE	0x4	S∨Z	Less or equal
GT	0x5	¬S	Greater than
GE	0x6	¬S∨Z	Greater or equal
VS	0x7	V	Overflow set
VC	0x8	¬V	Overflow clear
CS	0x9	C	Carry set
CC	0xA	¬C	Carry clear

Fetch-decode-execute cycle

The fetch-decode-execute cycle is composed of six steps:

1. Execute instruction in IR
2. Copy MAR to BKP
3. Copy PC to TMP (incremented by 1) and MAR
4. Read instruction from RAM and put it into IR
5. Increment PC (i.e. copy TMP to PC)
6. Copy BKP to MAR

Memory segmentation

Segment name	Start	End	Size (bytes)
Init	0x0000	0x0007	14
Data	0x0008	0x3fff	~32K
Code	0x4000	0x7fff	32K
Stack	0x8000	0xffff	64K

There are 128KB of RAM in total, as each 16-bit integers addresses a 2-byte block in RAM.

Micro-operations

The hardware can execute a really basic micro-operations set, composed of 6 micro-instructions.

MOV

Can be used for different purposes. Support conditioned execution.

From register to register:

Op-cpde	Condition	Reg/Mem	Source register	Destination register
01	XXXX	0	XXXX	XXXX	0

From register to memory:

Op-cpde	Condition	Reg/Mem	R/W	Source register
01	XXXX	1	1	XXXX	0000

From memory to register:

Op-cpde	Condition	Reg/Mem	R/W	Destination register
01	XXXX	1	0	XXXX	0000

SET

Set an immediate value (6 bits) into a register. Support conditioned execution.

Op-code	Condition	Register	Immediate value
10	XXXX	XXXX	XXXXXX

EXC

Execute an ALU operation (operands in A and B registers, output in OUT register). Support conditioned execution.

Op-code	Condition	ALU op-code	¬B	Set flags
11	XXXX	XXX	X	X	00000

LJR

Load jump register (JR) with a 14-bit address (offset inside code segment). Doesn't support conditioned execution.

Op-code	Offset	Op-code
0	XXXXXXXXXXXXXX	1

NOP

Do nothing. Support conditioned execution.

Op-code	Condition
00	XXXX	0000000000

HLT

Halt program and computer execution. Support conditioned execution.

Op-code	Condition
00	XXXX	1000000000

Instruction set

All the instructions can be executed conditionally. All the instructions involving an ALU operation can update the flags register.

Instruction name	Operand 1	Operand 2	Operand 3	Description
SET	<reg>	<val>	-	Set immediate value <val> into <reg> (max value is 32)
PUT	<reg>	<addr>	-	Set 16-bit immediate address into <reg>
MOV	<reg-1>	<reg-2>	-	Move a value from <reg-2> to <reg-1>
LDR	<reg>	<reg-addr>	-	Load into <reg> the value in memory at position <reg-addr>
STR	<reg>	<reg-addr>	-	Store value in <reg> in memory at position <reg-addr>
ADD	<reg-1>	<reg-2>	<reg-3>	Add <reg-2> and <reg-3> into <reg-1>
SUB	<reg-1>	<reg-2>	<reg-3>	Subtract <reg-3> from <reg-2> into <reg-1>
AND	<reg-1>	<reg-2>	<reg-3>	Bitwise and <reg-2> and <reg-3> into <reg-1>
ORR	<reg-1>	<reg-2>	<reg-3>	Birwise or <reg-2> and <reg-3> into <reg-1>
EOR	<reg-1>	<reg-2>	<reg-3>	Birwise xor <reg-2> and <reg-3> into <reg-1>
LSL	<reg-1>	<reg-2>	<reg-shift>	Copy <reg-2> shifted to the left by <reg-shift> to <reg-1>
LSR	<reg-1>	<reg-2>	<reg-shift>	Copy <reg-2> shifted to the right by <reg-shift> to <reg-1>
ASR	<reg-1>	<reg-2>	<reg-shift>	Copy <reg-2> shifted to the right by <reg-shift> (but maintaining sign) to <reg-1>
CMP	<reg-1>	<reg-2>	-	Update ALU flags basing on <reg-1> and <reg-2> subtraction
JMP	<addr>	-	-	Jump to a certain address
PSH	<reg>	-	-	Push <reg> on the stack
POP	<reg>	-	-	Pop <reg> from the stack
CAL	<addr>	-	-	Call a certain function (address <addr>)
RET	-	-	-	Return from a function
PRT	<reg>	-	-	Print <reg> on the hexadecimal display
NOP	-	-	-	Do nothing
HLT	-	-	-	Halt program execution