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clamchowder committed Sep 28, 2024
2 parents 6417ea8 + 2a5a540 commit ef59e86
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Showing 7 changed files with 195 additions and 10 deletions.
15 changes: 7 additions & 8 deletions AsmGen/Program.cs
Original file line number Diff line number Diff line change
Expand Up @@ -36,14 +36,18 @@ static void Main(string[] args)
tests.Add(new MixIntRfDepBranchTest(4, 100, 1, 8));
tests.Add(new MixIntRfDepBranchTest(4, 100, 1, 16));
tests.Add(new AddSchedTest(16, 100, 1));
tests.Add(new PdepSchedTest(10, 100, 1));
tests.Add(new MulSchedTest(4, 64, 1));
tests.Add(new LeaSchedTest(4, 64, 1));
tests.Add(new MaddSchedTest(4, 64, 1));
tests.Add(new JumpSchedTest(4, 64, 1));
tests.Add(new MixJumpThenAddSched(20, 160, 1));
tests.Add(new TakenJumpSchedTest(4, 64, 1));
tests.Add(new LoadSchedTest(4, 72, 1));
tests.Add(new StoreNsq(4, 100, 1));
tests.Add(new LoadNsq(10, 100, 1));
tests.Add(new StoreSchedTest(4, 72, 1));
tests.Add(new StoreDataNsq(20, 70, 1));
tests.Add(new StoreDataSchedTest(4, 80, 1));
tests.Add(new MixAddJumpSchedTest(64, 100, 1));
tests.Add(new FaddSchedTest(30, 250, 1));
Expand All @@ -54,13 +58,13 @@ static void Main(string[] args)
tests.Add(new AddvSched(8, 120, 1));
tests.Add(new FmovSched(8, 120, 1));
tests.Add(new FaddNsq(4, 140, 1, 200));
tests.Add(new AddNsq(4, 128, 1, 128));
tests.Add(new Fadd128SchedTest(4, 200, 1));
tests.Add(new Fadd256SchedTest(4, 200, 1));
tests.Add(new Fma256SchedTest(4, 200, 1));
tests.Add(new CvtSchedTest(4, 180, 1));
tests.Add(new Fadd128RfTest(200, 400, 1, false));
tests.Add(new Fadd256RfTest(200, 400, 1, Fadd256RfTest.TestMode.none));
tests.Add(new Fadd256RfTest(200, 400, 1, Fadd256RfTest.TestMode.pendingavx512instr));
tests.Add(new BtbTest(4, BtbTest.BranchType.Unconditional));
tests.Add(new BtbTest(8, BtbTest.BranchType.Unconditional));
tests.Add(new BtbTest(16, BtbTest.BranchType.Unconditional));
Expand All @@ -79,15 +83,10 @@ static void Main(string[] args)
tests.Add(new NopLoopTest(512, 1));
tests.Add(new AddLoopTest(4, 100, 1));
tests.Add(new AeseSchedTest(4, 180, 1));
tests.Add(new VecMulNsq(4, 160, 1, 160));
tests.Add(new FpStoreDataNsqTest(20, 230, 1));
tests.Add(new FpStoreDataNsqTest(10, 115, 1));
tests.Add(new AesencNsq(4, 100, 1, 200));
tests.Add(new Vec512RfTest(20, 500, 1));
tests.Add(new MixVec512Vec256RfTest(20, 500, 1));
tests.Add(new MixVec512Vec256BlockRfTest(200, 500, 1, 240));
tests.Add(new MixVec512Vec256BlockRfTest(200, 500, 1, 144));
tests.Add(new MixVec512Vec256BlockRfTest(200, 500, 1, 120));
tests.Add(new MixVec512Vec256BlockRfTest(200, 500, 1, 60));
tests.Add(new AesencNsq(4, 100, 1, 160));
tests.Add(new MmxRfTest(20, 200, 1));

List<Task> tasks = new List<Task>();
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41 changes: 41 additions & 0 deletions AsmGen/tests/AddNsq.cs
Original file line number Diff line number Diff line change
@@ -0,0 +1,41 @@
using System.Text;

namespace AsmGen
{
public class AddNsq : UarchTest
{
private int totalOps;
public AddNsq(int low, int high, int step, int totalOps)
{
this.Counts = UarchTestHelpers.GenerateCountArray(low, high, step);
this.Prefix = "addnsq" + totalOps;
this.Description = "Integer adds, excluding possible NSQ";
this.FunctionDefinitionParameters = "uint64_t iterations, int *arr, float *floatArr";
this.GetFunctionCallParameters = "structIterations, A, fpArr";
this.DivideTimeByCount = false;
this.totalOps = totalOps;
}

public override bool SupportsIsa(IUarchTest.ISA isa)
{
// if (isa == IUarchTest.ISA.aarch64) return true;
if (isa == IUarchTest.ISA.amd64) return true;
return false;
}

public override void GenerateAsm(StringBuilder sb, IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.amd64)
{
string[] depInstrs = new string[2];
depInstrs[0] = " add %rdi, %r15";
depInstrs[1] = " add %rdi, %r14";

string[] indepInstrs = new string[2];
indepInstrs[0] = " add %r13, %r11";
indepInstrs[1] = " add %r12, %r11";
UarchTestHelpers.GenerateX86AsmNsqTestFuncs(sb, this.totalOps, this.Counts, this.Prefix, depInstrs, indepInstrs, false);
}
}
}
}
4 changes: 2 additions & 2 deletions AsmGen/tests/AesencNsq.cs
Original file line number Diff line number Diff line change
Expand Up @@ -27,8 +27,8 @@ public override void GenerateAsm(StringBuilder sb, IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.amd64)
{
string postLoadInstrs = " movq %edi, %xmm1";
string initInstrs = " movq %r12, %xmm2";
string postLoadInstrs = " mov %rdi, %r15\n add %r8, %r15\n movdqu (%r15), %xmm1";
string initInstrs = " movdqu (%r8), %xmm2";
string[] depInstrs = new string[4];
depInstrs[0] = " aesenc %xmm1, %xmm0";
depInstrs[1] = " aesenc %xmm1, %xmm3";
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36 changes: 36 additions & 0 deletions AsmGen/tests/PdepSchedTest.cs
Original file line number Diff line number Diff line change
@@ -0,0 +1,36 @@
using System.Text;

namespace AsmGen
{
public class PdepSchedTest : UarchTest
{
public PdepSchedTest(int low, int high, int step)
{
this.Counts = UarchTestHelpers.GenerateCountArray(low, high, step);
this.Prefix = "pdepsched";
this.Description = "Scheduler, PDEP";
this.FunctionDefinitionParameters = "uint64_t iterations, int *arr";
this.GetFunctionCallParameters = "structIterations, A";
this.DivideTimeByCount = false;
}

public override bool SupportsIsa(IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.amd64) return true;
return false;
}

public override void GenerateAsm(StringBuilder sb, IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.amd64)
{
string[] unrolledAdds = new string[4];
unrolledAdds[0] = " pdep %rdi, %r15, %r15";
unrolledAdds[1] = " pdep %rdi, %r14, %r14";
unrolledAdds[2] = " pdep %rdi, %r13, %r13";
unrolledAdds[3] = " pdep %rdi, %r12, %r12";
UarchTestHelpers.GenerateX86AsmStructureTestFuncs(sb, this.Counts, this.Prefix, unrolledAdds, unrolledAdds, includePtrChasingLoads: false);
}
}
}
}
1 change: 1 addition & 0 deletions AsmGen/tests/ReturnStackTest.cs
Original file line number Diff line number Diff line change
Expand Up @@ -77,6 +77,7 @@ public void GenerateX86GccAsm(StringBuilder sb)
sb.AppendLine(" call " + GetFunctionName(callDepth, callIdx + 1));
}

sb.AppendLine(".align 64");
sb.AppendLine(" ret");
}
}
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45 changes: 45 additions & 0 deletions AsmGen/tests/StoreDataNsqTest.cs
Original file line number Diff line number Diff line change
@@ -0,0 +1,45 @@
using System.Text;

namespace AsmGen
{
public class StoreDataNsq : UarchTest
{
public StoreDataNsq(int low, int high, int step)
{
this.Counts = UarchTestHelpers.GenerateCountArray(low, high, step);
this.Prefix = "storedatansq";
this.Description = "Store Data Scheduler, excluding NSQ";
this.FunctionDefinitionParameters = "uint64_t iterations, int *arr, float *floatArr";
this.GetFunctionCallParameters = "structIterations, A, fpArr";
this.DivideTimeByCount = false;
}

public override bool SupportsIsa(IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.amd64) return true;
// if (isa == IUarchTest.ISA.aarch64) return true;
// if (isa == IUarchTest.ISA.mips64) return true;
// if (isa == IUarchTest.ISA.riscv) return true;
return false;
}

public override void GenerateAsm(StringBuilder sb, IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.amd64)
{
string[] dependentLoads = new string[4];
dependentLoads[0] = " mov %rdi, (%r8)";
dependentLoads[1] = " mov %rdi, 8(%r8)";
dependentLoads[2] = " mov %rdi, 16(%r8)";
dependentLoads[3] = " mov %rdi, 24(%r8)";

string[] independentLoads = new string[4];
independentLoads[0] = " mov %r14, (%r8)";
independentLoads[1] = " mov %r14, 8(%r8)";
independentLoads[2] = " mov %r14, 16(%r8)";
independentLoads[3] = " mov %r14, 24(%r8)";
UarchTestHelpers.GenerateX86AsmNsqTestFuncs(sb, this.Counts[this.Counts.Length - 1], this.Counts, this.Prefix, dependentLoads, independentLoads);
}
}
}
}
63 changes: 63 additions & 0 deletions AsmGen/tests/VecMulNsq.cs
Original file line number Diff line number Diff line change
@@ -0,0 +1,63 @@
using System.Text;

namespace AsmGen
{
public class VecMulNsq : UarchTest
{
private int totalOps;
public VecMulNsq(int low, int high, int step, int totalOps)
{
this.Counts = UarchTestHelpers.GenerateCountArray(low, high, step);
this.Prefix = "vecmulnsq" + totalOps;
this.Description = "Vector Integer Multiply, excluding possible NSQ";
this.FunctionDefinitionParameters = "uint64_t iterations, int *arr, float *floatArr";
this.GetFunctionCallParameters = "structIterations, A, fpArr";
this.DivideTimeByCount = false;
this.totalOps = totalOps;
}

public override bool SupportsIsa(IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.aarch64) return true;
if (isa == IUarchTest.ISA.amd64) return true;
return false;
}

public override void GenerateAsm(StringBuilder sb, IUarchTest.ISA isa)
{
if (isa == IUarchTest.ISA.amd64)
{
string postLoadInstrs = " mov %rdi, %r15\n add %r8, %r15\n movdqu (%r15), %xmm1";
string initInstrs = " movdqu (%r8), %xmm2";
string[] depInstrs = new string[4];
depInstrs[0] = " pmulld %xmm1, %xmm0";
depInstrs[1] = " pmulld %xmm1, %xmm3";
depInstrs[2] = " pmulld %xmm1, %xmm4";
depInstrs[3] = " pmulld %xmm1, %xmm5";

string[] indepInstrs = new string[2];
indepInstrs[0] = " pmulld %xmm2, %xmm6";
indepInstrs[1] = " pmulld %xmm2, %xmm7";
UarchTestHelpers.GenerateX86AsmNsqTestFuncs(sb, this.totalOps, this.Counts, this.Prefix, depInstrs, indepInstrs, false, initInstrs, postLoadInstrs);
}
else if (isa == IUarchTest.ISA.aarch64)
{
string postLoadInstrs1 = " ldr s16, [x2, w25, uxtw #2]";
string initInstrs = " ldr s15, [x2]";
string[] depInstrs = new string[4];
depInstrs[0] = " fadd s0, s0, s16";
depInstrs[1] = " fadd s1, s1, s16";
depInstrs[2] = " fadd s2, s2, s16";
depInstrs[3] = " fadd s3, s3, s16";

string[] indepInstrs = new string[4];
indepInstrs[0] = " fadd s17, s17, s15";
indepInstrs[1] = " fadd s18, s18, s15";
indepInstrs[2] = " fadd s19, s19, s15";
indepInstrs[3] = " fadd s20, s20, s15";
UarchTestHelpers.GenerateArmAsmNsqTestFuncs(sb, this.totalOps, this.Counts, this.Prefix, depInstrs, indepInstrs, false, initInstrs,
postLoadInstrs: postLoadInstrs1);
}
}
}
}

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