build(deps): bump third_party/tools/circt-verilog from 8e62f65 to 44a38c4
#6520
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Bumps [third_party/tools/circt-verilog](https://github.com/llvm/circt) from `8e62f65` to `44a38c4`. - [Release notes](https://github.com/llvm/circt/releases) - [Commits](llvm/circt@8e62f65...44a38c4) --- updated-dependencies: - dependency-name: third_party/tools/circt-verilog dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
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Superseded by #6530. |
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Bumps third_party/tools/circt-verilog from
8e62f65to44a38c4.Commits
44a38c4[VerifToSMT] Exit early after too many clocks error (#7923)6aadc70[Calyx] Avoid using designated initializers (#7926)46793f4[circt-bmc][VerifToSMT] Add initial value support (#7903)dbd1d7c[circt-bmc] Add a simple test with a register storing an aggregate (#7922)9c80a00[HWToSMT] ArrayCreateOp and ArrayGetOp support (#7666)ad1f68e[SCFToCalyx] Lower Arith CmpFOp to Calyx (#7860)b16f1ad[FIRRTL] FoldUnusedBits: minor cleanup (#7914)e2ebea5[FIRRTL] FoldUnusedBits: Cast compressed data back to signed integer (#7913)b152422[ImportVerilog] add sized stream concat operation (#7784)99930ad[HW] ExportHier: do not include bound in modules (#7915)Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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