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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,15 @@ | ||
| - name: RNG | ||
| address: 0x40023C00 | ||
| registers: | ||
| kind: rng | ||
| version: v3 | ||
| block: RNG | ||
| rcc: | ||
| bus_clock: HCLK | ||
| kernel_clock: HCLK | ||
| enable: | ||
| register: AHBPCENR | ||
| field: TRNG_EN | ||
| interrupts: | ||
| - signal: GLOBAL | ||
| interrupt: RNG |
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,57 +1,49 @@ | ||
| block/RNG: | ||
| description: Random number generator. | ||
| items: | ||
| - name: CR | ||
| description: control register. | ||
| byte_offset: 0 | ||
| fieldset: CR | ||
| - name: SR | ||
| description: status register. | ||
| byte_offset: 4 | ||
| fieldset: SR | ||
| - name: DR | ||
| description: data register. | ||
| byte_offset: 8 | ||
| access: Read | ||
| fieldset: DR | ||
| - name: CR | ||
| description: control register. | ||
| byte_offset: 0 | ||
| fieldset: CR | ||
| - name: SR | ||
| description: status register. | ||
| byte_offset: 4 | ||
| fieldset: SR | ||
| - name: DR | ||
| description: data register. | ||
| byte_offset: 8 | ||
| access: Read | ||
| fieldset/CR: | ||
| description: control register. | ||
| fields: | ||
| - name: RNGEN | ||
| description: Random number generator enable. | ||
| bit_offset: 2 | ||
| bit_size: 1 | ||
| - name: IE | ||
| description: Interrupt enable. | ||
| bit_offset: 3 | ||
| bit_size: 1 | ||
| fieldset/DR: | ||
| description: data register. | ||
| fields: | ||
| - name: RNDATA | ||
| description: Random data. | ||
| bit_offset: 0 | ||
| bit_size: 32 | ||
| - name: RNGEN | ||
| description: Random number generator enable. | ||
| bit_offset: 2 | ||
| bit_size: 1 | ||
| - name: IE | ||
| description: Interrupt enable. | ||
| bit_offset: 3 | ||
| bit_size: 1 | ||
| fieldset/SR: | ||
| description: status register. | ||
| fields: | ||
| - name: DRDY | ||
| description: Data ready. | ||
| bit_offset: 0 | ||
| bit_size: 1 | ||
| - name: CECS | ||
| description: Clock error current status. | ||
| bit_offset: 1 | ||
| bit_size: 1 | ||
| - name: SECS | ||
| description: Seed error current status. | ||
| bit_offset: 2 | ||
| bit_size: 1 | ||
| - name: CEIS | ||
| description: Clock error interrupt status. | ||
| bit_offset: 5 | ||
| bit_size: 1 | ||
| - name: SEIS | ||
| description: Seed error interrupt status. | ||
| bit_offset: 6 | ||
| bit_size: 1 | ||
| - name: DRDY | ||
| description: Data ready. | ||
| bit_offset: 0 | ||
| bit_size: 1 | ||
| - name: CECS | ||
| description: Clock error current status. | ||
| bit_offset: 1 | ||
| bit_size: 1 | ||
| - name: SECS | ||
| description: Seed error current status. | ||
| bit_offset: 2 | ||
| bit_size: 1 | ||
| - name: CEIS | ||
| description: Clock error interrupt status. | ||
| bit_offset: 5 | ||
| bit_size: 1 | ||
| - name: SEIS | ||
| description: Seed error interrupt status. | ||
| bit_offset: 6 | ||
| bit_size: 1 |