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Add separate models for Xilinx transceivers for each generation #379

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Add separate models for Xilinx transceivers for each generation

Add separate models for Xilinx transceivers for each generation #379

Triggered via pull request December 12, 2024 21:36
@tfcollinstfcollins
synchronize #158
tfcollins/fpga-pll-fixes
Status Success
Total duration 1m 55s
Artifacts –

pull-test.yml

on: pull_request
Matrix: build
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