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Add separate models for Xilinx transceivers for each generation #374

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Add separate models for Xilinx transceivers for each generation

Add separate models for Xilinx transceivers for each generation #374

Triggered via pull request December 11, 2024 21:50
@tfcollinstfcollins
synchronize #158
tfcollins/fpga-pll-fixes
Status Failure
Total duration 1m 43s
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pull-test.yml

on: pull_request
Matrix: build
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build (ubuntu-20.04, 3.8)
Process completed with exit code 1.