Add constraint for ref clock on FPGAs to be related to core clock #645
Workflow file for this run
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| name: Vale | |
| on: push | |
| jobs: | |
| Vale: | |
| runs-on: ubuntu-latest | |
| steps: | |
| - uses: actions/checkout@v2 | |
| - uses: actions/setup-python@v1 | |
| with: | |
| python-version: '3.8' | |
| architecture: x64 | |
| - name: Install dependencies | |
| run: | | |
| sudo apt-get install -y python3-pip python3-setuptools | |
| pip install rst2html | |
| wget https://github.com/errata-ai/vale/releases/download/v2.15.4/vale_2.15.4_Linux_64-bit.tar.gz | |
| mkdir bin && tar -xvzf vale_2.15.4_Linux_64-bit.tar.gz -C bin | |
| export PATH="./bin:$PATH" | |
| vale -v | |
| cd .github/doc | |
| bash scripts/get_styles.sh | |
| cp styles/GoogleUpdate/* styles/Google/ | |
| cd ../.. | |
| - name: Lint doc | |
| run: | | |
| export PATH="./bin:$PATH" | |
| vale docs |