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fix(SDHC): Fix SDHC Driver Clock Divider for MAX78002 #800
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Jake-Carter
merged 12 commits into
analogdevicesinc:main
from
Jake-Carter:fix/sdhc-clk-ai87
Dec 22, 2023
Merged
fix(SDHC): Fix SDHC Driver Clock Divider for MAX78002 #800
Jake-Carter
merged 12 commits into
analogdevicesinc:main
from
Jake-Carter:fix/sdhc-clk-ai87
Dec 22, 2023
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Jake-Carter
changed the title
fix(SDHC): Fix SDHC Driver Clock Divider for MAX78002
fix(SDHC): Fix SDHC Driver Clock Divider for MAX78002
Nov 17, 2023
lorne-maxim
approved these changes
Dec 20, 2023
sihyung-maxim
approved these changes
Dec 20, 2023
Examples/MAX78002/SDHC_Raw/main.c
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Comment on lines
299
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305
// if (SystemCoreClock > 96000000) { | ||
// printf("SD clock ratio (at card) 4:1\n"); | ||
// MXC_SDHC_Set_Clock_Config(1); | ||
// } else { | ||
// printf("SD clock ratio (at card) 2:1\n"); | ||
// MXC_SDHC_Set_Clock_Config(0); | ||
// } |
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Are we leaving these in just in case?
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Thanks, good catch. I was, but they can be removed now
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Description
Closes #797 and implements #791 for the MAX780002
Ports the MAX78002 SDHC_FAT example using the new CLI for #770
Also reduces the default SDHC_CLK_FREQ to 30Mhz, since MAX78002 initializes with the 60Mhz ISO by default.
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