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fix(PeriphDrivers): Fix UART Functional Regression for MAX32670, MAX3…
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…2672, MAX32675, MAX32657 (#1150)

Co-authored-by: Jake-Carter <[email protected]>
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@Jake-Carter
Jake-Carter and Jake-Carter authored Sep 6, 2024
1 parent a7230c2 commit 79af4e9
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Showing 9 changed files with 342 additions and 173 deletions.
1 change: 1 addition & 0 deletions Libraries/PeriphDrivers/Include/MAX32670/uart.h
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Expand Up @@ -86,6 +86,7 @@ typedef enum {
/*32K (ERTCO) and INRO clocks can only be used for UART3*/
MXC_UART_ERTCO_CLK = 4,
MXC_UART_INRO_CLK = 5,
MXC_UART_AOD_CLK = 6
} mxc_uart_clock_t;

/**
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1 change: 1 addition & 0 deletions Libraries/PeriphDrivers/Include/MAX32672/uart.h
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Original file line number Diff line number Diff line change
Expand Up @@ -86,6 +86,7 @@ typedef enum {
/*32K (ERTCO) and 80K (INRO) clocks can only be used for UART3*/
MXC_UART_ERTCO_CLK = 4,
MXC_UART_INRO_CLK = 5,
MXC_UART_AOD_CLK = 6
} mxc_uart_clock_t;

/**
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3 changes: 2 additions & 1 deletion Libraries/PeriphDrivers/Include/MAX32675/uart.h
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Expand Up @@ -84,7 +84,8 @@ typedef enum {
MXC_UART_IBRO_CLK = 2,
MXC_UART_ERFO_CLK = 3,
/*32K (ERTCO) clock can only be used for UART3*/
MXC_UART_ERTCO_CLK = 4,
MXC_UART_AOD_CLK = 4,
MXC_UART_INRO_CLK = 5
} mxc_uart_clock_t;

/**
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2 changes: 2 additions & 0 deletions Libraries/PeriphDrivers/Source/AFE/hart_uart.c
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Expand Up @@ -173,9 +173,11 @@ static int hart_uart_init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clo
MXC_AFE_GPIO_Config(&gpio_cfg_extclk);
break;

#if TARGET_NUM != 32675
case MXC_UART_ERTCO_CLK:
return E_BAD_PARAM;
break;
#endif

case MXC_UART_IBRO_CLK:
MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO);
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158 changes: 106 additions & 52 deletions Libraries/PeriphDrivers/Source/UART/uart_me15.c
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Expand Up @@ -18,6 +18,7 @@
*
******************************************************************************/

#include <math.h>
#include "uart.h"
#include "mxc_device.h"
#include "mxc_pins.h"
Expand Down Expand Up @@ -110,6 +111,10 @@ int MXC_UART_Init(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clo
}
#endif // MSDK_NO_GPIO_CLK_INIT

retval = MXC_UART_SetClockSource(uart, clock);
if (retval)
return retval;

return MXC_UART_RevB_Init((mxc_uart_revb_regs_t *)uart, baud, clock);
}

Expand Down Expand Up @@ -153,73 +158,78 @@ int MXC_UART_ReadyForSleep(mxc_uart_regs_t *uart)
int MXC_UART_SetFrequency(mxc_uart_regs_t *uart, unsigned int baud, mxc_uart_clock_t clock)
{
int freq;
int mod = 0;
int clkdiv = 0;
int div = 8;
uint32_t clock_freq = 0;
uint8_t aon_clk_div;

if (MXC_UART_GET_IDX(uart) < 0) {
return E_BAD_PARAM;
}

// check if the uart is LPUART
if (uart == MXC_UART3) {
// OSR default value
uart->osr = 5;
// Default OSR default value
uart->osr = 5;

switch (clock) {
case MXC_UART_APB_CLK:
uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_PERIPHERAL_CLOCK;
div = (1 << (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV)) * 8;
clkdiv = ((SystemCoreClock / div) / baud);
mod = ((SystemCoreClock / div) % baud);
break;
switch (clock) {
case MXC_UART_APB_CLK:
clock_freq = PeripheralClock;
break;
case MXC_UART_EXT_CLK:
clock_freq = EXTCLK_FREQ;
break;
case MXC_UART_IBRO_CLK:
clock_freq = IBRO_FREQ;

case MXC_UART_EXT_CLK:
uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_EXTERNAL_CLOCK;
clkdiv = EXTCLK_FREQ / baud;
mod = EXTCLK_FREQ % baud;
break;
if (baud > 2400) {
uart->osr = 0;
} else {
uart->osr = 1;
}

case MXC_UART_ERTCO_CLK:
uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK2;
uart->ctrl |= MXC_F_UART_CTRL_FDM;
clkdiv = ((ERTCO_FREQ * 2) / baud);
mod = ((ERTCO_FREQ * 2) % baud);

if (baud > 2400) {
uart->osr = 0;
} else {
uart->osr = 1;
}
break;
break;

case MXC_UART_INRO_CLK:
uart->ctrl |= MXC_S_UART_CTRL_BCLKSRC_CLK3;
uart->ctrl |= MXC_F_UART_CTRL_FDM;
clkdiv = ((INRO_FREQ * 2) / baud);
mod = ((INRO_FREQ * 2) % baud);

if (baud > 2400) {
uart->osr = 0;
} else {
uart->osr = 1;
}
break;
case MXC_UART_ERFO_CLK:
clock_freq = ERFO_FREQ;
break;

default:
return E_BAD_PARAM;
case MXC_UART_ERTCO_CLK:
clock_freq = ERTCO_FREQ;
uart->ctrl |= MXC_F_UART_CTRL_FDM;

if (baud > 2400) {
uart->osr = 0;
} else {
uart->osr = 1;
}

if (!clkdiv || mod > (baud / 2)) {
clkdiv++;
break;

case MXC_UART_INRO_CLK:
clock_freq = INRO_FREQ;
uart->ctrl |= MXC_F_UART_CTRL_FDM;

if (baud > 2400) {
uart->osr = 0;
} else {
uart->osr = 1;
}
uart->clkdiv = clkdiv;

freq = MXC_UART_GetFrequency(uart);
} else {
freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, baud, clock);
break;

case MXC_UART_AOD_CLK:
aon_clk_div = (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_AON_CLKDIV) >>
MXC_F_GCR_PCLKDIV_AON_CLKDIV_POS;
clock_freq = PeripheralClock / (4 * (pow(2, aon_clk_div)));
break;

default:
return E_BAD_PARAM;
}

if (uart->ctrl & MXC_F_UART_CTRL_FDM) {
clock_freq *= 2; // x2 to account for FDM
}

freq = MXC_UART_RevB_SetFrequency((mxc_uart_revb_regs_t *)uart, clock_freq, baud);

if (freq > 0) {
// Enable baud clock and wait for it to become ready.
uart->ctrl |= MXC_F_UART_CTRL_BCLKEN;
Expand Down Expand Up @@ -325,7 +335,51 @@ int MXC_UART_SetFlowCtrl(mxc_uart_regs_t *uart, mxc_uart_flow_t flowCtrl, int rt

int MXC_UART_SetClockSource(mxc_uart_regs_t *uart, mxc_uart_clock_t clock)
{
return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock);
uint8_t clock_option = 0;

switch (MXC_UART_GET_IDX(uart)) {
case 0:
case 1:
case 2:
switch (clock) {
case MXC_UART_APB_CLK:
clock_option = 0;
break;
case MXC_UART_EXT_CLK:
clock_option = 1;
break;
case MXC_UART_IBRO_CLK:
MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_IBRO);
clock_option = 2;
break;
case MXC_UART_ERFO_CLK:
MXC_SYS_ClockSourceEnable(MXC_SYS_CLOCK_ERFO);
clock_option = 3;
break;
default:
return E_BAD_PARAM;
}
break;
case 3:
switch (clock) {
case MXC_UART_AOD_CLK:
clock_option = 0;
break;
case MXC_UART_EXT_CLK:
clock_option = 1;
break;
case MXC_UART_ERTCO_CLK:
clock_option = 2;
break;
case MXC_UART_INRO_CLK:
clock_option = 3;
break;
default:
return E_BAD_PARAM;
}
}

return MXC_UART_RevB_SetClockSource((mxc_uart_revb_regs_t *)uart, clock_option);
}

int MXC_UART_GetActive(mxc_uart_regs_t *uart)
Expand Down
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