Add support for AD4052 ADC Family

Documentation/devicetree/bindings/iio/adc/adi,ad4052.yaml

@@ -0,0 +1,107 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright 2024 Analog Devices Inc.
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/iio/adc/adi,ad4052.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Analog Devices AD4052 ADC family device driver
+
+maintainers:
+  - Jorge Marques <[email protected]>
+
+description: |
+  Analog Devices AD4052 Single Channel Precision SAR ADC family
+
+  https://www.analog.com/media/en/technical-documentation/data-sheets/ad4050.pdf
+  https://www.analog.com/media/en/technical-documentation/data-sheets/ad4052.pdf
+
+properties:
+  compatible:
+    enum:
+      - adi,ad4050
+      - adi,ad4052
+      - adi,ad4056
+      - adi,ad4058
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    description:
+      Reference clock
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  dmas:
+    maxItems: 1
+
+  dma-names:
+    const: rx
+
+  pwms:
+    maxItems: 1
+
+  pwm-names:
+    const: cnv
+
+  cnv-gpios:
+    maxItems: 1
+
+  gp0-gpios:
+    maxItems: 1
+
+  gp1-gpios:
+    maxItems: 1
+
+  spi-max-frequency:
+    maximum: 62500000
+
+  vdd-supply: true
+  vdd_1_8-supply: true
+  vio-supply: true
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - dmas
+  - dma-names
+  - pwms
+  - pwm-names
+  - interrupts
+  - gp1-gpios
+
+allOf:
+  - $ref: /schemas/spi/spi-peripheral-props.yaml#
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/gpio/gpio.h>
+
+    spi {
+        #address-cells = <1>;
+        #size-cells = <0>;
+
+        adc@0 {
+            compatible = "adi,ad4052";
+            reg = <0>;
+            spi-max-frequency = <25000000>;
+
+            clocks = <&clk0>;
+            dmas = <&dma 0>;
+            dma-names = "rx";
+            pwm-names = "cnv";
+            pwms = <&adc_trigger 0 0>;
+            cnv-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
+            gp1-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+            gp0-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+            interrupts = <0 2>;
+            interrupt-parent = <&gpio>;
+        };
+    };
+...

arch/arm/boot/dts/xilinx/zynq-coraz7s-ad4052.dts

@@ -0,0 +1,87 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Analog Devices AD4052
+ *
+ * hdl_project: <ad4052_ardz/coraz7s>
+ *
+ * Copyright (C) 2024 Analog Devices Inc.
+ */
+
+/dts-v1/;
+#include "zynq-coraz7s.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+
+&fpga_axi {
+	axi_iic: i2c@41600000 {
+		compatible = "xlnx,axi-iic-1.01.b", "xlnx,xps-iic-2.00.a";
+		reg = <0x41600000 0x10000>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>;
+		clock-names = "s_axi_aclk";
+
+		#size-cells = <0>;
+		#address-cells = <1>;
+
+		eeprom1: eeprom@52 {
+			compatible = "atmel,24c32";
+			reg = <0x52>;
+		};
+
+	};
+
+	rx_dma: rx-dmac@44a30000 {
+		compatible = "adi,axi-dmac-1.00.a";
+		reg = <0x44a30000 0x1000>;
+		#dma-cells = <1>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>;
+	};
+
+	spi_clk: axi-clkgen@44a70000 {
+		compatible = "adi,axi-clkgen-2.00.a";
+		reg = <0x44a70000 0x10000>;
+		#clock-cells = <0>;
+		clocks = <&clkc 15>, <&clkc 15>;
+		clock-names = "s_axi_aclk", "clkin1";
+		clock-output-names = "spi_clk";
+	};
+
+	adc_trigger: pwm@44b00000 {
+		compatible = "adi,axi-pwmgen-2.00.a";
+		reg = <0x44b00000 0x1000>;
+		label = "ad4052_cnv";
+		#pwm-cells = <2>;
+		clocks = <&spi_clk>;
+	};
+
+	axi_spi_engine: spi@44a00000 {
+		compatible = "adi-ex,axi-spi-engine-1.00.a";
+		reg = <0x44a00000 0x1FF>;
+		interrupt-parent = <&intc>;
+		interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&clkc 15>, <&spi_clk>;
+		clock-names = "s_axi_aclk", "spi_clk";
+		num-cs = <1>;
+
+		#address-cells = <0x1>;
+		#size-cells = <0x0>;
+
+		ad4052: ad4052@0 {
+			compatible = "adi,ad4052";
+			reg = <0>;
+			spi-max-frequency = <62500000>;
+			clocks = <&spi_clk>;
+			clock-names = "ref_clk";
+			dmas = <&rx_dma 0>;
+			dma-names = "rx";
+			pwm-names = "cnv";
+			pwms = <&adc_trigger 0 0>;
+			cnv-gpios = <&gpio0 88 GPIO_ACTIVE_HIGH>;
+			gp1-gpios = <&gpio0 87 GPIO_ACTIVE_HIGH>;
+			gp0-gpios = <&gpio0 86 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};

drivers/iio/Kconfig.adi

@@ -38,6 +38,7 @@ config IIO_ALL_ADI_DRIVERS
 	imply ADXL380_SPI if SPI
 
 	imply AD4000
+	imply AD4052
 	imply AD4630
 	imply AD4695
 	imply AD4130

drivers/iio/adc/Kconfig

@@ -71,6 +71,20 @@ config AD400X
 	  To compile this driver as a module, choose M here: the module will be
 	  called ad400x.
 
+config AD4052
+	tristate "Analog Devices AD4052 Driver"
+	depends on SPI && PWM
+	select IIO_BUFFER
+	select IIO_BUFFER_DMA
+	select IIO_BUFFER_DMAENGINE
+	select REGMAP_SPI
+	help
+	  Say yes here to build support for Analog Devices AD4052 SPI analog
+	  to digital converters (ADC).
+
+	  To compile this driver as a module, choose M here: the module will be
+	  called ad4052.
+
 config AD4630
 	tristate "Analog Device AD4630 ADC Driver"
 	depends on SPI_MASTER

drivers/iio/adc/Makefile

@@ -10,6 +10,7 @@ obj-$(CONFIG_AD4130) += ad4130.o
 obj-$(CONFIG_AD_PULSAR) += ad_pulsar.o
 obj-$(CONFIG_AD400X) += ad400x.o
 obj-$(CONFIG_AD4000) += ad4000.o
+obj-$(CONFIG_AD4052) += ad4052.o
 obj-$(CONFIG_AD4134) += ad4134.o
 obj-$(CONFIG_AD4630) += ad4630.o
 obj-$(CONFIG_AD6676) += ad6676.o