projects/ad3552r_evb: Added project for AD3552R-EVB on ZedBoard.

The project controls the AD3552R digital-to-analog converter and transmits data written in the DDR memory to the QSPI interface of the DAC. The reference clock is generated by an axi_clkgen IP and is configured to output a 133MHz signal. If both channels are enabled and data streaming is DDR the sample rate is 16.65MSPS. If just one channel is enabled and data streaming is DDR the sample rate is 33.3MSPS. The VADJ voltage should be set to 1.8V. Signed-off-by: PopPaul2021 <[email protected]>
analogdevicesinc · Oct 2, 2023 · debbc3e · debbc3e
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diff --git a/projects/ad3552r_evb/Makefile b/projects/ad3552r_evb/Makefile
@@ -0,0 +1,7 @@
+####################################################################################
+## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+
+include ../scripts/project-toplevel.mk
diff --git a/projects/ad3552r_evb/Readme.md b/projects/ad3552r_evb/Readme.md
@@ -0,0 +1,8 @@
+# AD3552R-EVB HDL Project
+
+Here are some pointers to help you:
+  * [Board Product Page](https://www.analog.com/eval-ad3552r)
+  * Parts : [ AD3552R Dual Channel, 16-Bit, 33 MUPS, Multispan, Multi-IO SPI DAC ](https://www.analog.com/en/products/ad3552r.html)
+  * Project Doc: https://wiki.analog.com/resources/eval/user-guides/dac/ad3552r_eval_zed
+  * HDL Doc: https://wiki.analog.com/resources/eval/user-guides/dac/ad3552r_eval_zed
+  * Linux Drivers: https://wiki.analog.com/resources/tools-software/linux-drivers/iio-dac/axi-ad3552r
diff --git a/projects/ad3552r_evb/common/ad3552r_evb_bd.tcl b/projects/ad3552r_evb/common/ad3552r_evb_bd.tcl
@@ -0,0 +1,53 @@
+###############################################################################
+## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+create_bd_port -dir O               dac_sclk
+create_bd_port -dir O               dac_csn
+create_bd_port -dir I -from 3 -to 0 dac_spi_sdi
+create_bd_port -dir O -from 3 -to 0 dac_spi_sdo
+create_bd_port -dir O               dac_spi_sdo_t
+
+ad_ip_instance axi_dmac axi_dac_dma
+ad_ip_parameter axi_dac_dma CONFIG.DMA_TYPE_SRC 0
+ad_ip_parameter axi_dac_dma CONFIG.DMA_TYPE_DEST 1
+ad_ip_parameter axi_dac_dma CONFIG.CYCLIC 1
+ad_ip_parameter axi_dac_dma CONFIG.SYNC_TRANSFER_START 0
+ad_ip_parameter axi_dac_dma CONFIG.AXI_SLICE_SRC 0
+ad_ip_parameter axi_dac_dma CONFIG.AXI_SLICE_DEST 0
+ad_ip_parameter axi_dac_dma CONFIG.DMA_2D_TRANSFER 0
+ad_ip_parameter axi_dac_dma CONFIG.DMA_DATA_WIDTH_SRC 32 
+ad_ip_parameter axi_dac_dma CONFIG.DMA_DATA_WIDTH_DEST 32
+
+ad_ip_instance axi_ad3552r axi_ad3552r_dac
+
+ad_connect axi_ad3552r_dac/dac_sclk       dac_sclk
+ad_connect axi_ad3552r_dac/dac_csn        dac_csn
+ad_connect axi_ad3552r_dac/sdio_i         dac_spi_sdi
+ad_connect axi_ad3552r_dac/sdio_o         dac_spi_sdo
+ad_connect axi_ad3552r_dac/sdio_t         dac_spi_sdo_t
+ad_connect axi_ad3552r_dac/dma_data       axi_dac_dma/m_axis_data
+ad_connect axi_ad3552r_dac/valid_in_dma   axi_dac_dma/m_axis_valid
+ad_connect axi_ad3552r_dac/dac_data_ready axi_dac_dma/m_axis_ready
+ad_connect sys_rstgen/peripheral_aresetn  axi_dac_dma/m_src_axi_aresetn 
+
+ad_ip_instance  axi_clkgen axi_clkgen
+ad_ip_parameter axi_clkgen CONFIG.ID 1
+ad_ip_parameter axi_clkgen CONFIG.CLKIN_PERIOD 10
+ad_ip_parameter axi_clkgen CONFIG.VCO_DIV 1
+ad_ip_parameter axi_clkgen CONFIG.VCO_MUL 8
+ad_ip_parameter axi_clkgen CONFIG.CLK0_DIV 6
+
+
+ad_connect axi_clkgen/clk         sys_ps7/FCLK_CLK0 
+ad_connect axi_clkgen/clk_0       axi_ad3552r_dac/dac_clk   
+ad_connect axi_clkgen/clk_0       axi_dac_dma/m_axis_aclk   
+
+ad_cpu_interconnect 0x44a30000 axi_dac_dma
+ad_cpu_interconnect 0x44a70000 axi_ad3552r_dac
+ad_cpu_interconnect 0x44B00000 axi_clkgen
+
+ad_cpu_interrupt "ps-13" "mb-13" axi_dac_dma/irq
+
+ad_mem_hp0_interconnect sys_cpu_clk axi_dac_dma/m_src_axi
diff --git a/projects/ad3552r_evb/common/ad3552r_evb_fmc.txt b/projects/ad3552r_evb/common/ad3552r_evb_fmc.txt
@@ -0,0 +1,18 @@
+# ad3552r
+
+FMC_pin   FMC_port       Schematic_name     System_top_name       IOSTANDARD  Termination
+
+ D12      FMC_LA05_N     /RESET              ad3552r_resetn       LVCMOS25    #N/A
+ G6       FMC_LA00_CC_P  SPI_SCLK            ad3552r_spi_sclk     LVCMOS25    #N/A
+ G7       FMC_LA00_CC_N  SPI_/CS             ad3552r_spi_cs       LVCMOS25    #N/A
+ H7       FMC_LA02_P     SPI_SDIO0           ad3552r_spi_sdio[0]  LVCMOS25    #N/A
+ H8       FMC_LA02_N     SPI_SDIO1           ad3552r_spi_sdio[1]  LVCMOS25    #N/A
+ G9       FMC_LA03_P     SPI_SDIO2           ad3552r_spi_sdio[2]  LVCMOS25    #N/A
+ G10      FMC_LA03_N     SPI_SDIO3           ad3552r_spi_sdio[3]  LVCMOS25    #N/A
+ D11      FMC_LA05_P     /LDAC               ad3552r_ldacn        LVCMOS25    #N/A
+ H10      FMC_LA04_P     /ALERT              ad3552r_alertn       LVCMOS25    #N/A
+ H11      FMC_LA04_N     SPI_QPI             ad3552r_qspi_sel     LVCMOS25    #N/A
+ C10      FMC_LA06_P     GPIO_6              ad3552r_gpio_6       LVCMOS25    #N/A
+ C11      FMC_LA06_N     GPIO_7              ad3552r_gpio_7       LVCMOS25    #N/A
+ H13      FMC_LA07_P     GPIO_8              ad3552r_gpio_8       LVCMOS25    #N/A
+ H14      FMC_LA07_N     GPIO_9              ad3552r_gpio_9       LVCMOS25    #N/A
diff --git a/projects/ad3552r_evb/zed/Makefile b/projects/ad3552r_evb/zed/Makefile
@@ -0,0 +1,25 @@
+####################################################################################
+## Copyright (c) 2018 - 2023 Analog Devices, Inc.
+### SPDX short identifier: BSD-1-Clause
+## Auto-generated, do not modify!
+####################################################################################
+
+PROJECT_NAME := ad3552r_evb_zed
+
+M_DEPS += ../common/ad3552r_evb_bd.tcl
+M_DEPS += ../../scripts/adi_pd.tcl
+M_DEPS += ../../common/zed/zed_system_constr.xdc
+M_DEPS += ../../common/zed/zed_system_bd.tcl
+M_DEPS += ../../../library/common/ad_iobuf.v
+
+LIB_DEPS += axi_ad3552r
+LIB_DEPS += axi_clkgen
+LIB_DEPS += axi_dmac
+LIB_DEPS += axi_hdmi_tx
+LIB_DEPS += axi_i2s_adi
+LIB_DEPS += axi_spdif_tx
+LIB_DEPS += axi_sysid
+LIB_DEPS += sysid_rom
+LIB_DEPS += util_i2c_mixer
+
+include ../../scripts/project-xilinx.mk
diff --git a/projects/ad3552r_evb/zed/system_bd.tcl b/projects/ad3552r_evb/zed/system_bd.tcl
@@ -0,0 +1,18 @@
+###############################################################################
+## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source $ad_hdl_dir/projects/common/zed/zed_system_bd.tcl
+source $ad_hdl_dir/projects/scripts/adi_pd.tcl
+
+set mem_init_sys_path [get_env_param ADI_PROJECT_DIR ""]mem_init_sys.txt;
+
+#system ID
+ad_ip_parameter axi_sysid_0 CONFIG.ROM_ADDR_BITS 9
+ad_ip_parameter rom_sys_0 CONFIG.PATH_TO_FILE "[pwd]/$mem_init_sys_path"
+ad_ip_parameter rom_sys_0 CONFIG.ROM_ADDR_BITS 9
+
+sysid_gen_sys_init_file
+
+source ../common/ad3552r_evb_bd.tcl
diff --git a/projects/ad3552r_evb/zed/system_constr.xdc b/projects/ad3552r_evb/zed/system_constr.xdc
@@ -0,0 +1,24 @@
+###############################################################################
+## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+# ad3552r_fmc SPI interface
+
+set_property -dict {PACKAGE_PIN P17 IOSTANDARD LVCMOS25} [get_ports {ad3552r_spi_sdio[0]}]   ; # FMC_LA02_P    IO_L20P_T3_34   
+set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS25} [get_ports {ad3552r_spi_sdio[1]}]   ; # FMC_LA02_N    IO_L20N_T3_34 
+set_property -dict {PACKAGE_PIN N22 IOSTANDARD LVCMOS25} [get_ports {ad3552r_spi_sdio[2]}]   ; # FMC_LA03_P    IO_L16P_T2_34    
+set_property -dict {PACKAGE_PIN P22 IOSTANDARD LVCMOS25} [get_ports {ad3552r_spi_sdio[3]}]   ; # FMC_LA03_N    IO_L16N_T2_34    
+
+set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS25 } [get_ports ad3552r_spi_sclk]       ; # FMC_LA00_CC_P IO_L13P_T2_MRCC_34   
+set_property -dict {PACKAGE_PIN M20 IOSTANDARD LVCMOS25 } [get_ports ad3552r_spi_cs]         ; # FMC_LA00_CC_N IO_L13N_T2_MRCC_34   
+
+set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS25} [get_ports ad3552r_ldacn]           ; # FMC_LA05_P    IO_L7P_T1_34   
+set_property -dict {PACKAGE_PIN K18 IOSTANDARD LVCMOS25} [get_ports ad3552r_resetn]          ; # FMC_LA05_N    IO_L7N_T1_34    
+set_property -dict {PACKAGE_PIN M21 IOSTANDARD LVCMOS25} [get_ports ad3552r_alertn]          ; # FMC_LA04_P    IO_L15P_T2_DQS_34     
+set_property -dict {PACKAGE_PIN M22 IOSTANDARD LVCMOS25} [get_ports ad3552r_qspi_sel]        ; # FMC_LA04_N    IO_L15N_T2_DQS_34   
+
+set_property -dict {PACKAGE_PIN L21 IOSTANDARD LVCMOS25} [get_ports ad3552r_gpio_6]          ; # FMC_LA06_P    IO_L10P_T1_34 
+set_property -dict {PACKAGE_PIN L22 IOSTANDARD LVCMOS25} [get_ports ad3552r_gpio_7]          ; # FMC_LA06_N    IO_L10N_T1_34 
+set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS25} [get_ports ad3552r_gpio_8]          ; # FMC_LA07_P    IO_L21P_T3_DQS_34  
+set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS25} [get_ports ad3552r_gpio_9]          ; # FMC_LA07_N    IO_L21N_T3_DQS_34
diff --git a/projects/ad3552r_evb/zed/system_project.tcl b/projects/ad3552r_evb/zed/system_project.tcl
@@ -0,0 +1,17 @@
+###############################################################################
+## Copyright (C) 2022-2023 Analog Devices, Inc. All rights reserved.
+### SPDX short identifier: ADIBSD
+###############################################################################
+
+source ../../../scripts/adi_env.tcl
+source $ad_hdl_dir/projects/scripts/adi_project_xilinx.tcl
+source $ad_hdl_dir/projects/scripts/adi_board.tcl
+
+adi_project ad3552r_evb_zed
+adi_project_files ad3552r_evb_zed [list \
+  "system_top.v" \
+  "system_constr.xdc" \
+  "$ad_hdl_dir/projects/common/zed/zed_system_constr.xdc" \
+  "$ad_hdl_dir/library/common/ad_iobuf.v" ]
+
+adi_project_run ad3552r_evb_zed