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projects/scripts/project-intel.mk: change 'system_top.v' to '$(wildca…
…rd system_top*.v)' (#1169) Change necessary to build intel projects with different system_top verilog files. This was patterned to https://github.com/analogdevicesinc/hdl/blob/ae09b8a1bb123a40d2b9c112e3049f79755f2a7b/projects/scripts/project-xilinx.mk#L70 Signed-off-by: Jem Geronimo <[email protected]>
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