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projects/cn0561: Add FMC pin descripton for all carriers
* Added txt description of all FMC pins used/unused * Updated constraint files with FMC pinout location Signed-off-by: laurentiu_popa <[email protected]>
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Original file line number | Diff line number | Diff line change |
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# CN0561_FMC | ||
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FMC_pin FMC_port Schematic_name System_top_name IOSTANDARD Termination | ||
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# cn0561 SPI configuration interface | ||
G9 LA03_P DEC3/SDO cn0561_spi_sdi LVCMOS25 #N/A | ||
H11 LA04_N DEC2/SDI cn0561_spi_sdo LVCMOS25 #N/A | ||
D8 LA01_P_CC FORMAT1/SCLK cn0561_spi_sclk LVCMOS25 #N/A | ||
D11 LA05_P FORMAT0/CSB cn0561_spi_cs LVCMOS25 #N/A | ||
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# cn0561 data interface | ||
H4 CLK0_M2C_P DCLK cn0561_dclk LVCMOS25 #N/A | ||
G7 LA00_N_CC DOUT0 cn0561_din[0] LVCMOS25 #N/A | ||
C11 LA06_N DOUT1 cn0561_din[1] LVCMOS25 #N/A | ||
H7 LA02_P DOUT2 cn0561_din[2] LVCMOS25 #N/A | ||
H8 LA02_N DOUT3 cn0561_din[3] LVCMOS25 #N/A | ||
G6 LA00_P_CC ODR cn0561_odr LVCMOS25 #N/A | ||
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# cn0561 GPIO lines | ||
G18 LA16_P RESETB cn0561_resetn LVCMOS25 #N/A | ||
H13 LA07_P PDNB cn0561_pdn LVCMOS25 #N/A | ||
H10 LA04_P MODE cn0561_mode LVCMOS25 #N/A | ||
C14 LA10_P DCLKRATE0/GPIO0 cn0561_gpio0 LVCMOS25 #N/A | ||
C15 LA10_N DCLKRATE1/GPIO1 cn0561_gpio1 LVCMOS25 #N/A | ||
H16 LA11_P DCLKRATE2/GPIO2 cn0561_gpio2 LVCMOS25 #N/A | ||
G15 LA12_P FILTER0/GPIO4 cn0561_gpio4 LVCMOS25 #N/A | ||
G16 LA12_N FILTER1/GPIO5 cn0561_gpio5 LVCMOS25 #N/A | ||
D17 LA13_P FRAME0/GPIO6 cn0561_gpio6 LVCMOS25 #N/A | ||
D18 LA13_N FRAME1/GPIO7 cn0561_gpio7 LVCMOS25 #N/A | ||
C10 LA06_P PINB/SPI cn0561_pinbspi LVCMOS25 #N/A |
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