Update Zephyr MSDK Hal based on MSDK PR: analogdevicesinc/msdk#1071

MAX/Libraries/PeriphDrivers/Source/SDHC/sdhc_ai87.c

@@ -68,17 +68,17 @@ int MXC_SDHC_Init(const mxc_sdhc_cfg_t *cfg)
 unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
 {
     // Figure 4-1 of the preliminary AI85 UG (04/01/2022) shows the SDHC hardware block
-    // connected directly to the SYS_CLK node.  This is most likely inaccurate, but the
+    // connected directly to the IPO Clock node.  This is most likely inaccurate, but the
     // register description for MXC_GCR->pclkdiv marks the usual SDHC divider as reserved.
     // We will follow figure 4-1 for now.
 
     if (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIS1_SDHC) {
-        return SystemCoreClock >> 2; // Div by 4
+        return IPO_FREQ >> 2; // Div by 4
     } else {
-        return SystemCoreClock >> 1; // Div by 2
+        return IPO_FREQ >> 1; // Div by 2
     }
 
-    return SystemCoreClock;
+    return IPO_FREQ;
 }
 
 /* ************************************************************************** */

MAX/Libraries/PeriphDrivers/Source/SDHC/sdhc_me10.c

@@ -85,9 +85,9 @@ unsigned int MXC_SDHC_Get_Clock_Config(void)
 unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
 {
     if (MXC_GCR->pclk_div & MXC_F_GCR_PCLK_DIV_SDHCFRQ) {
-        return SystemCoreClock >> 1; // Div by 2
+        return HIRC96_FREQ >> 1; // Div by 2
     } else {
-        return 50000000; // UG specifies a hard-coded 50Mhz value in this case
+        return 50000000; // UG specifies a hard-coded 50Mhz low-power oscillator
     }
 }
 

MAX/Libraries/PeriphDrivers/Source/SDHC/sdhc_me13.c

@@ -68,9 +68,9 @@ unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
 {
     // TODO(JC): Confirm this is the scheme used by ME13
     if (MXC_GCR->pclkdiv & MXC_F_GCR_PCLKDIV_SDHCFRQ) {
-        return SystemCoreClock >> 2; // Div by 4
+        return IPO_FREQ >> 2; // Div by 4
     } else {
-        return SystemCoreClock >> 1; // Div by 2
+        return IPO_FREQ >> 1; // Div by 2
     }
 }
 

MAX/Libraries/PeriphDrivers/Source/SDHC/sdhc_me14.c

@@ -68,9 +68,9 @@ int MXC_SDHC_Init(const mxc_sdhc_cfg_t *cfg)
 unsigned int MXC_SDHC_Get_Input_Clock_Freq(void)
 {
     if (MXC_GCR->pckdiv & MXC_F_GCR_PCKDIV_SDHCFRQ) {
-        return SystemCoreClock >> 2; // Div by 4
+        return HIRC96_FREQ >> 2; // Div by 4
     } else {
-        return SystemCoreClock >> 1; // Div by 2
+        return HIRC96_FREQ >> 1; // Div by 2
     }
 }
 

MAX/msdk_sha

@@ -1 +1 @@
-6ff04ecf174ebdd7c78a187034b483d180bba283
+4d53dd087b18b3d3bae5e17e6a5aef2f72077880