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17
...argeting/cn0585_fmcz/+AnalogDevicesDemo/+cn0585_led_sw_gpio_control_demo/+common/add_io.m
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| % function add_io(hRD,project,fpga,type) | ||
| % | ||
| % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% | ||
| % % Add AXI4 and AXI4-Lite slave interfaces | ||
| % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% | ||
| % out = AnalogDevices.get_memory_axi_interface_info(fpga,lower(project)); | ||
| % hRD.addAXI4SlaveInterface( ... | ||
| % 'InterfaceConnection', out.InterfaceConnection, ... | ||
| % 'BaseAddress', out.BaseAddress, ... | ||
| % 'MasterAddressSpace', out.MasterAddressSpace); | ||
| % | ||
| % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% | ||
| % % Add Reference design interfaces | ||
| % %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% | ||
| % AnalogDevices.add_io_ports(hRD,lower(project),lower(type),lower(fpga)); | ||
| % | ||
| % end |
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20
...gDevicesDemo/+cn0585_led_sw_gpio_control_demo/+common/hdlcoder_ref_design_customization.m
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| function [rd,boardName] = hdlcoder_ref_design_customization | ||
| % Reference design plugin registration file | ||
| % 1. The registration file with this name inside of a board plugin folder | ||
| % will be picked up | ||
| % 2. Any registration file with this name on MATLAB path will also be picked up | ||
| % 3. The registration file returns a cell array pointing to the location of | ||
| % the reference design plugins | ||
| % 4. The registration file also returns its associated board name | ||
| % 5. Reference design plugin must be a package folder accessible from | ||
| % MATLAB path, and contains a reference design definition file | ||
|
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||
| % Copyright 2013-2014 The MathWorks, Inc. | ||
|
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| rd = {... | ||
| 'AnalogDevicesDemo.cn0585_led_sw_gpio_control_demo.zed.tx.plugin_rd', ... | ||
| }; | ||
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| boardName = 'AnalogDevices CN0585 GPIO Control'; | ||
|
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| end |
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...ng/cn0585_fmcz/+AnalogDevicesDemo/+cn0585_led_sw_gpio_control_demo/+common/plugin_board.m
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| function hB = plugin_board(BoardName) | ||
| % Use Plugin API to create board plugin object | ||
|
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| % Copyright 2015 The MathWorks, Inc. | ||
|
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| hB = hdlcoder.Board; | ||
|
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| % Target Board Information | ||
| hB.BoardName = sprintf('AnalogDevices CN0585 GPIO Control'); | ||
|
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| % FPGA Device | ||
| hB.FPGAVendor = 'Xilinx'; | ||
| hB.FPGAFamily = 'Zynq'; | ||
|
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| % Determine the device based on the board | ||
|
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| hB.FPGADevice = sprintf('xc7%s', 'z020'); | ||
| hB.FPGAPackage = 'clg484'; | ||
| hB.FPGASpeed = '-1'; | ||
| hB.FPGAFamily = 'Zynq'; | ||
|
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| % Tool Info | ||
| hB.SupportedTool = {'Xilinx Vivado'}; | ||
|
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| % FPGA JTAG chain position | ||
| hB.JTAGChainPosition = 2; | ||
|
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| %% Add interfaces | ||
| % Standard "External Port" interface |
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...eting/cn0585_fmcz/+AnalogDevicesDemo/+cn0585_led_sw_gpio_control_demo/+common/plugin_rd.m
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| function hRD = plugin_rd(board, design) | ||
| % Reference design definition | ||
|
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| % Copyright 2014-2015 The MathWorks, Inc. | ||
|
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| % pname = upper(project); | ||
| % ppath = project; | ||
| % if strcmpi(project, 'cn0585') | ||
| % ppath = 'cn0585_fmcz'; | ||
| % end | ||
|
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| board = 'zed'; | ||
| design = 'Tx'; | ||
|
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| hRD = hdlcoder.ReferenceDesign('SynthesisTool', 'Xilinx Vivado'); | ||
|
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| % This is the base reference design that other RDs can build upon | ||
| hRD.ReferenceDesignName = sprintf('%s (%s)', upper(board), design); | ||
|
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| % Determine the board name based on the design | ||
| hRD.BoardName = sprintf('AnalogDevices CN0585 GPIO Control'); | ||
|
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| % Tool information | ||
| hRD.SupportedToolVersion = {'2022.2'}; | ||
|
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| % Get the root directories | ||
| rootDirExample = fileparts(strtok(mfilename('fullpath'), '+')); | ||
| tmp = strsplit(rootDirExample,filesep); | ||
|
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| if isunix | ||
| rootDir = fullfile(filesep,tmp{1:end-3}); | ||
| else | ||
| rootDir = fullfile(tmp{1:end-3}); | ||
| end | ||
| rootDirBSP = fullfile('hdl','vendor','AnalogDevices','vivado'); | ||
|
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| % Design files are shared | ||
| hRD.SharedRD = true; | ||
| hRD.SharedRDFolder = rootDir; | ||
|
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| %% Set top level project pieces | ||
| hRD.addParameter( ... | ||
| 'ParameterID', 'project', ... | ||
| 'DisplayName', 'HDL Project Subfolder', ... | ||
| 'DefaultValue', 'cn0585_led_sw_gpio_control_demo'); | ||
|
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| hRD.addParameter( ... | ||
| 'ParameterID', 'carrier', ... | ||
| 'DisplayName', 'HDL Project Carrier', ... | ||
| 'DefaultValue', 'zed'); | ||
|
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| %% Add custom design files | ||
| hRD.addCustomVivadoDesign( ... | ||
| 'CustomBlockDesignTcl', fullfile('hdl','vendor','AnalogDevices','vivado','projects','scripts', 'system_project_rxtx.tcl')); | ||
|
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| %% Standard reference design pieces | ||
| hRD.BlockDesignName = 'system'; | ||
|
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| % custom source files | ||
| hRD.CustomFiles = {... | ||
| fullfile('projects')..., | ||
| fullfile('library')..., | ||
| fullfile('scripts')..., | ||
| }; | ||
|
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| % custom source files | ||
| hRD.CustomFiles = {... | ||
| fullfile(rootDirBSP, 'scripts')..., | ||
| fullfile(rootDirBSP, 'library')..., | ||
| fullfile(rootDirBSP, 'library','xilinx')..., | ||
| fullfile(rootDirBSP, 'projects','common')..., | ||
| fullfile(rootDirBSP, 'projects','scripts')..., | ||
| fullfile(rootDirBSP, 'projects','cn0585_fmcz')..., | ||
| fullfile(rootDirBSP, 'projects','cn0585_fmcz', 'common')..., | ||
| fullfile(rootDirBSP, 'projects','cn0585_fmcz', 'zed')..., | ||
| fullfile('pcx_examples', 'targeting', 'cn0585_fmcz', 'cn0585_hdl')..., | ||
| }; | ||
|
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| hRD.addParameter( ... | ||
| 'ParameterID', 'ref_design', ... | ||
| 'DisplayName', 'Reference Type', ... | ||
| 'DefaultValue', lower(strrep(design, ' & ',''))); | ||
|
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| hRD.addParameter( ... | ||
| 'ParameterID', 'fpga_board', ... | ||
| 'DisplayName', 'FPGA Boad', ... | ||
| 'DefaultValue', upper(board)); | ||
|
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| hRD.addParameter( ... | ||
| 'ParameterID', 'preprocess', ... | ||
| 'DisplayName', 'Preprocess', ... | ||
| 'DefaultValue', 'on'); | ||
| hRD.addParameter( ... | ||
| 'ParameterID', 'preprocess_script', ... | ||
| 'DisplayName', 'Preprocess Script', ... | ||
| 'DefaultValue', fullfile('pcx_examples', 'targeting', 'cn0585_fmcz','fh_preprocess.tcl')); | ||
|
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| hRD.addParameter( ... | ||
| 'ParameterID', 'postprocess', ... | ||
| 'DisplayName', 'Postprocess', ... | ||
| 'DefaultValue', 'off'); | ||
|
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| %% Add IO | ||
| %AnalogDevices.add_io(hRD,'cn0585_led_sw_gpio_control_demo',board,design); | ||
|
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| %% Add interfaces | ||
| % add clock interface | ||
| hRD.addClockInterface( ... | ||
| 'ClockConnection', 'axi_clkgen/clk_0', ... | ||
| 'ResetConnection', 'sampling_clk_rstgen/peripheral_aresetn'); |
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...ting/cn0585_fmcz/+AnalogDevicesDemo/+cn0585_led_sw_gpio_control_demo/+zed/+tx/add_tx_io.m
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,107 @@ | ||
| function add_tx_io(hRD) | ||
|
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| % add AXI4 and AXI4-Lite slave interfaces | ||
| hRD.addAXI4SlaveInterface( ... | ||
| 'InterfaceConnection', 'axi_cpu_interconnect/M20_AXI', ... | ||
| 'BaseAddress', '0x43C00000', ... | ||
| 'MasterAddressSpace', 'sys_ps7/Data'); | ||
|
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| %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% | ||
| % Tx Reference design interfaces | ||
| %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'IP Data 0 IN', ... | ||
| 'InterfaceType', 'IN', ... | ||
| 'PortName', 'axi_ltc2387_0_adc_data', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ltc2387_0/adc_data', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'IP Data 1 IN', ... | ||
| 'InterfaceType', 'IN', ... | ||
| 'PortName', 'axi_ltc2387_1_adc_data', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ltc2387_1/adc_data', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'IP Data 2 IN', ... | ||
| 'InterfaceType', 'IN', ... | ||
| 'PortName', 'axi_ltc2387_2_adc_data', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ltc2387_2/adc_data', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'IP Data 3 IN', ... | ||
| 'InterfaceType', 'IN', ... | ||
| 'PortName', 'axi_ltc2387_3_adc_data', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ltc2387_3/adc_data', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'IP Load Tx Data OUT', ... | ||
| 'InterfaceType', 'OUT', ... | ||
| 'PortName', 'axi_ad3552r_0_valid_in_a', ... | ||
| 'PortWidth', 1, ... | ||
| 'InterfaceConnection', 'axi_ad3552r_0/valid_in_a', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'IP Valid Tx Data IN', ... | ||
| 'InterfaceType', 'IN', ... | ||
| 'PortName', 'axi_ltc2387_0_adc_valid', ... | ||
| 'PortWidth', 1, ... | ||
| 'InterfaceConnection', 'axi_ltc2387_0/adc_valid', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'CN0585 DAC Data 0 OUT', ... | ||
| 'InterfaceType', 'OUT', ... | ||
| 'PortName', 'axi_ad3552r_0_data_in_a', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ad3552r_0/data_in_a', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'CN0585 DAC Data 1 OUT', ... | ||
| 'InterfaceType', 'OUT', ... | ||
| 'PortName', 'axi_ad3552r_0_data_in_b', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ad3552r_0/data_in_b', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'CN0585 DAC Data 2 OUT', ... | ||
| 'InterfaceType', 'OUT', ... | ||
| 'PortName', 'axi_ad3552r_1_data_in_a', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ad3552r_1/data_in_a', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'CN0585 DAC Data 3 OUT', ... | ||
| 'InterfaceType', 'OUT', ... | ||
| 'PortName', 'axi_ad3552r_1_data_in_b', ... | ||
| 'PortWidth', 16, ... | ||
| 'InterfaceConnection', 'axi_ad3552r_1/data_in_b', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'GPIO IN SW', ... | ||
| 'InterfaceType', 'IN', ... | ||
| 'PortName', 'xlslice_1_Dout', ... | ||
| 'PortWidth', 8, ... | ||
| 'InterfaceConnection', 'xlslice_1/Dout', ... | ||
| 'IsRequired', false); | ||
|
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| hRD.addInternalIOInterface( ... | ||
| 'InterfaceID', 'GPIO OUT LED', ... | ||
| 'InterfaceType', 'OUT', ... | ||
| 'PortName', 'xlconcat_1_In1', ... | ||
| 'PortWidth', 8, ... | ||
| 'InterfaceConnection', 'xlconcat_1/In1', ... | ||
| 'IsRequired', false); |
20 changes: 20 additions & 0 deletions
20
...DevicesDemo/+cn0585_led_sw_gpio_control_demo/+zed/+tx/hdlcoder_ref_design_customization.m
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,20 @@ | ||
| function [rd, boardName] = hdlcoder_ref_design_customization | ||
| % Reference design plugin registration file | ||
| % 1. The registration file with this name inside of a board plugin folder | ||
| % will be picked up | ||
| % 2. Any registration file with this name on MATLAB path will also be picked up | ||
| % 3. The registration file returns a cell array pointing to the location of | ||
| % the reference design plugins | ||
| % 4. The registration file also returns its associated board name | ||
| % 5. Reference design plugin must be a package folder accessible from | ||
| % MATLAB path, and contains a reference design definition file | ||
|
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| % Copyright 2013-2014 The MathWorks, Inc. | ||
|
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| rd = {... | ||
| 'AnalogDevicesDemo.cn0585_led_sw_gpio_control_demo.zed.tx.plugin_rd', ... | ||
| }; | ||
|
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| boardName = 'AnalogDevicesDemo cn0585_led_sw_gpio_control AnalogDevies CN0585 GPIO Control (Tx)'; | ||
|
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| end |
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9
...g/cn0585_fmcz/+AnalogDevicesDemo/+cn0585_led_sw_gpio_control_demo/+zed/+tx/plugin_board.m
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,9 @@ | ||
| function hP = plugin_board() | ||
| % Zynq Platform PCore | ||
| % Use Plugin API to create board plugin object | ||
|
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| % Copyright 2015 The MathWorks, Inc. | ||
|
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| % Call the common board definition function | ||
| % hP = AnalogDevicesDemo.cn0585_led_sw_gpio_control_demo.common.plugin_board('AnalogDevies CN0585 GPIO Control ', 'Tx'); | ||
| hP = AnalogDevicesDemo.cn0585_led_sw_gpio_control_demo.common.plugin_board('AnalogDevies CN0585 GPIO Control'); |
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8
...ting/cn0585_fmcz/+AnalogDevicesDemo/+cn0585_led_sw_gpio_control_demo/+zed/+tx/plugin_rd.m
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,8 @@ | ||
| function hRD = plugin_rd | ||
| % Reference design definition | ||
|
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| % Copyright 2014-2015 The MathWorks, Inc. | ||
|
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| % Call the common reference design definition function | ||
| hRD = AnalogDevicesDemo.cn0585_led_sw_gpio_control_demo.common.plugin_rd('AnalogDevies CN0585 GPIO Control', 'Tx'); | ||
| AnalogDevicesDemo.cn0585_led_sw_gpio_control_demo.zed.tx.add_tx_io(hRD); |
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