Lab3 update

lab1/gA6_lab1.bdf

@@ -103,7 +103,7 @@ applicable agreement for further details.
 	(output)
 	(rect 232 48 408 64)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "Afloor13[2..0]" (rect 90 0 157 12)(font "Arial" ))
+	(text "Afloor13[3..0]" (rect 90 0 157 12)(font "Arial" ))
 	(pt 0 8)
 	(drawing
 		(line (pt 0 8)(pt 52 8))
@@ -203,7 +203,7 @@ applicable agreement for further details.
 	(bus)
 )
 (connector
-	(text "Afloor13[2..0]" (rect 349 120 416 132)(font "Arial" ))
+	(text "Afloor13[3..0]" (rect 349 120 416 132)(font "Arial" ))
 	(pt 296 128)
 	(pt 336 128)
 	(bus)

lab1/gA6_modulo_13.bdf

@@ -55,7 +55,7 @@ applicable agreement for further details.
 	(output)
 	(rect 248 56 424 72)
 	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
-	(text "Afloor13[2..0]" (rect 90 0 157 12)(font "Arial" ))
+	(text "Afloor13[3..0]" (rect 90 0 157 12)(font "Arial" ))
 	(pt 0 8)
 	(drawing
 		(line (pt 0 8)(pt 52 8))
@@ -364,7 +364,7 @@ applicable agreement for further details.
 	(flipx)
 )
 (symbol
-	(rect 114 56 146 88)
+	(rect 106 56 138 88)
 	(text "GND" (rect 16 8 26 29)(font "Arial" (font_size 6))(vertical))
 	(text "inst2" (rect 21 3 33 26)(font "Arial" )(vertical)(invisible))
 	(port
@@ -568,13 +568,13 @@ applicable agreement for further details.
 	(bus)
 )
 (connector
-	(text "Cout, S[7..6]" (rect 250 80 313 92)(font "Arial" ))
-	(pt 240 96)
-	(pt 312 96)
-	(bus)
+	(text "Gnd" (rect 42 64 62 76)(font "Arial" ))
+	(pt 74 72)
+	(pt 106 72)
 )
 (connector
-	(text "Gnd" (rect 50 64 70 76)(font "Arial" ))
-	(pt 82 72)
-	(pt 114 72)
+	(text "Gnd, Cout, S[7..6]" (rect 250 80 340 92)(font "Arial" ))
+	(pt 328 96)
+	(pt 240 96)
+	(bus)
 )

lab1/gA6_modulo_13.bsf

@@ -21,7 +21,7 @@ applicable agreement for further details.
 (header "symbol" (version "1.2"))
 (symbol
 	(rect 16 16 184 112)
-	(text "gA6_Modulo_13" (rect 5 0 97 14)(font "Arial" (font_size 8)))
+	(text "gA6_modulo_13" (rect 5 0 97 14)(font "Arial" (font_size 8)))
 	(text "inst" (rect 8 80 25 92)(font "Arial" ))
 	(port
 		(pt 0 32)
@@ -40,8 +40,8 @@ applicable agreement for further details.
 	(port
 		(pt 168 48)
 		(output)
-		(text "Afloor13[2..0]" (rect 0 0 77 14)(font "Arial" (font_size 8)))
-		(text "Afloor13[2..0]" (rect 70 43 147 57)(font "Arial" (font_size 8)))
+		(text "Afloor13[3..0]" (rect 0 0 77 14)(font "Arial" (font_size 8)))
+		(text "Afloor13[3..0]" (rect 70 43 147 57)(font "Arial" (font_size 8)))
 		(line (pt 168 48)(pt 152 48)(line_width 3))
 	)
 	(drawing

lab3/db/cmpr_6cg.tdf

@@ -0,0 +1,41 @@
+--lpm_compare CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone II" LPM_WIDTH=21 ONE_INPUT_IS_CONSTANT="YES" aeb dataa datab CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
+--VERSION_BEGIN 13.0 cbx_cycloneii 2013:04:24:18:08:47:SJ cbx_lpm_add_sub 2013:04:24:18:08:47:SJ cbx_lpm_compare 2013:04:24:18:08:47:SJ cbx_mgl 2013:04:24:18:11:10:SJ cbx_stratix 2013:04:24:18:08:47:SJ cbx_stratixii 2013:04:24:18:08:47:SJ  VERSION_END
+
+
+-- Copyright (C) 1991-2013 Altera Corporation
+--  Your use of Altera Corporation's design tools, logic functions 
+--  and other software and tools, and its AMPP partner logic 
+--  functions, and any output files from any of the foregoing 
+--  (including device programming or simulation files), and any 
+--  associated documentation or information are expressly subject 
+--  to the terms and conditions of the Altera Program License 
+--  Subscription Agreement, Altera MegaCore Function License 
+--  Agreement, or other applicable license agreement, including, 
+--  without limitation, that your use is for the sole purpose of 
+--  programming logic devices manufactured by Altera and sold by 
+--  Altera or its authorized distributors.  Please refer to the 
+--  applicable agreement for further details.
+
+
+
+--synthesis_resources = 
+SUBDESIGN cmpr_6cg
+( 
+	aeb	:	output;
+	dataa[20..0]	:	input;
+	datab[20..0]	:	input;
+) 
+VARIABLE 
+	aeb_result_wire[0..0]	: WIRE;
+	aneb_result_wire[0..0]	: WIRE;
+	data_wire[55..0]	: WIRE;
+	eq_wire	: WIRE;
+
+BEGIN 
+	aeb = eq_wire;
+	aeb_result_wire[] = (! aneb_result_wire[]);
+	aneb_result_wire[] = ((data_wire[0..0] # data_wire[1..1]) # data_wire[2..2]);
+	data_wire[] = ( datab[20..20], dataa[20..20], datab[19..19], dataa[19..19], datab[18..18], dataa[18..18], datab[17..17], dataa[17..17], datab[16..16], dataa[16..16], datab[15..15], dataa[15..15], datab[14..14], dataa[14..14], datab[13..13], dataa[13..13], datab[12..12], dataa[12..12], datab[11..11], dataa[11..11], datab[10..10], dataa[10..10], datab[9..9], dataa[9..9], datab[8..8], dataa[8..8], datab[7..7], dataa[7..7], datab[6..6], dataa[6..6], datab[5..5], dataa[5..5], datab[4..4], dataa[4..4], datab[3..3], dataa[3..3], datab[2..2], dataa[2..2], datab[1..1], dataa[1..1], datab[0..0], dataa[0..0], (data_wire[54..54] $ data_wire[55..55]), ((data_wire[50..50] $ data_wire[51..51]) # (data_wire[52..52] $ data_wire[53..53])), ((data_wire[46..46] $ data_wire[47..47]) # (data_wire[48..48] $ data_wire[49..49])), ((data_wire[42..42] $ data_wire[43..43]) # (data_wire[44..44] $ data_wire[45..45])), ((data_wire[38..38] $ data_wire[39..39]) # (data_wire[40..40] $ data_wire[41..41])), ((data_wire[34..34] $ data_wire[35..35]) # (data_wire[36..36] $ data_wire[37..37])), ((data_wire[30..30] $ data_wire[31..31]) # (data_wire[32..32] $ data_wire[33..33])), ((data_wire[26..26] $ data_wire[27..27]) # (data_wire[28..28] $ data_wire[29..29])), ((data_wire[22..22] $ data_wire[23..23]) # (data_wire[24..24] $ data_wire[25..25])), ((data_wire[18..18] $ data_wire[19..19]) # (data_wire[20..20] $ data_wire[21..21])), ((data_wire[14..14] $ data_wire[15..15]) # (data_wire[16..16] $ data_wire[17..17])), ((data_wire[11..11] # data_wire[12..12]) # data_wire[13..13]), (((data_wire[7..7] # data_wire[8..8]) # data_wire[9..9]) # data_wire[10..10]), (((data_wire[3..3] # data_wire[4..4]) # data_wire[5..5]) # data_wire[6..6]));
+	eq_wire = aeb_result_wire[];
+END;
+--VALID FILE

lab3/db/cntr_h1h.tdf

@@ -0,0 +1,176 @@
+--lpm_counter CBX_DECLARE_ALL_CONNECTED_PORTS="OFF" DEVICE_FAMILY="Cyclone II" lpm_port_updown="PORT_UNUSED" lpm_width=21 aclr clock cnt_en q CARRY_CHAIN="MANUAL" CARRY_CHAIN_LENGTH=48
+--VERSION_BEGIN 13.0 cbx_cycloneii 2013:04:24:18:08:47:SJ cbx_lpm_add_sub 2013:04:24:18:08:47:SJ cbx_lpm_compare 2013:04:24:18:08:47:SJ cbx_lpm_counter 2013:04:24:18:08:47:SJ cbx_lpm_decode 2013:04:24:18:08:47:SJ cbx_mgl 2013:04:24:18:11:10:SJ cbx_stratix 2013:04:24:18:08:47:SJ cbx_stratixii 2013:04:24:18:08:47:SJ  VERSION_END
+
+
+-- Copyright (C) 1991-2013 Altera Corporation
+--  Your use of Altera Corporation's design tools, logic functions 
+--  and other software and tools, and its AMPP partner logic 
+--  functions, and any output files from any of the foregoing 
+--  (including device programming or simulation files), and any 
+--  associated documentation or information are expressly subject 
+--  to the terms and conditions of the Altera Program License 
+--  Subscription Agreement, Altera MegaCore Function License 
+--  Agreement, or other applicable license agreement, including, 
+--  without limitation, that your use is for the sole purpose of 
+--  programming logic devices manufactured by Altera and sold by 
+--  Altera or its authorized distributors.  Please refer to the 
+--  applicable agreement for further details.
+
+
+FUNCTION cycloneii_lcell_comb (cin, dataa, datab, datac, datad)
+WITH ( LUT_MASK, SUM_LUTC_INPUT)
+RETURNS ( combout, cout);
+FUNCTION cycloneii_lcell_ff (aclr, clk, datain, ena, sclr, sdata, sload)
+WITH ( x_on_violation)
+RETURNS ( regout);
+
+--synthesis_resources = lut 21 reg 21 
+SUBDESIGN cntr_h1h
+( 
+	aclr	:	input;
+	clock	:	input;
+	cnt_en	:	input;
+	q[20..0]	:	output;
+) 
+VARIABLE 
+	counter_comb_bita0 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita1 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita2 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita3 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita4 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita5 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita6 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita7 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita8 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita9 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita10 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita11 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita12 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita13 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita14 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita15 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita16 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita17 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita18 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita19 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_comb_bita20 : cycloneii_lcell_comb
+		WITH (
+			LUT_MASK = "5A90",
+			SUM_LUTC_INPUT = "cin"
+		);
+	counter_reg_bit1a[20..0] : cycloneii_lcell_ff;
+	aclr_actual	: WIRE;
+	clk_en	: NODE;
+	data[20..0]	: NODE;
+	external_cin	: WIRE;
+	s_val[20..0]	: WIRE;
+	safe_q[20..0]	: WIRE;
+	sclr	: NODE;
+	sload	: NODE;
+	sset	: NODE;
+	updown_dir	: WIRE;
+
+BEGIN 
+	counter_comb_bita[20..0].cin = ( counter_comb_bita[19..0].cout, external_cin);
+	counter_comb_bita[20..0].dataa = ( counter_reg_bit1a[20..0].regout);
+	counter_comb_bita[20..0].datab = ( updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir, updown_dir);
+	counter_comb_bita[20..0].datad = ( B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1", B"1");
+	counter_reg_bit1a[].aclr = aclr_actual;
+	counter_reg_bit1a[].clk = clock;
+	counter_reg_bit1a[].datain = ( counter_comb_bita[20..0].combout);
+	counter_reg_bit1a[].ena = (clk_en & (((sclr # sset) # sload) # cnt_en));
+	counter_reg_bit1a[].sdata = ((! sclr) & ((sset & s_val[]) # ((! sset) & data[])));
+	counter_reg_bit1a[].sload = ((sclr # sset) # sload);
+	aclr_actual = aclr;
+	clk_en = VCC;
+	data[] = GND;
+	external_cin = B"1";
+	q[] = safe_q[];
+	s_val[] = B"111111111111111111111";
+	safe_q[] = counter_reg_bit1a[].regout;
+	sclr = GND;
+	sload = GND;
+	sset = GND;
+	updown_dir = B"1";
+END;
+--VALID FILE

lab3/db/gA6_lab3.asm.qmsg

@@ -1,6 +1,6 @@
-{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1509569608194 ""}
-{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 64-Bit " "Running Quartus II 64-Bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Web Edition " "Version 13.0.0 Build 156 04/24/2013 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1509569608194 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Nov 01 16:53:28 2017 " "Processing started: Wed Nov 01 16:53:28 2017" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1509569608194 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1509569608194 ""}
-{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off gA6_lab3 -c gA6_lab3 " "Command: quartus_asm --read_settings_files=off --write_settings_files=off gA6_lab3 -c gA6_lab3" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1509569608194 ""}
-{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" {  } {  } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1509569609225 ""}
-{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1509569609287 ""}
-{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 64-Bit " "Quartus II 64-Bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "471 " "Peak virtual memory: 471 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1509569609850 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 01 16:53:29 2017 " "Processing ended: Wed Nov 01 16:53:29 2017" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1509569609850 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Elapsed time: 00:00:01" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1509569609850 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1509569609850 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1509569609850 ""}
+{ "Info" "IQEXE_SEPARATOR" "" "*******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "Quartus II" 0 -1 1509576640524 ""}
+{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler Quartus II 64-Bit " "Running Quartus II 64-Bit Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 13.0.0 Build 156 04/24/2013 SJ Web Edition " "Version 13.0.0 Build 156 04/24/2013 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "Quartus II" 0 -1 1509576640524 ""} { "Info" "IQEXE_START_BANNER_TIME" "Wed Nov 01 18:50:40 2017 " "Processing started: Wed Nov 01 18:50:40 2017" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "Quartus II" 0 -1 1509576640524 ""}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "Assembler" 0 -1 1509576640524 ""}
+{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --read_settings_files=off --write_settings_files=off gA6_lab3 -c gA6_lab3 " "Command: quartus_asm --read_settings_files=off --write_settings_files=off gA6_lab3 -c gA6_lab3" {  } {  } 0 0 "Command: %1!s!" 0 0 "Assembler" 0 -1 1509576640524 ""}
+{ "Info" "IASM_ASM_GENERATING_POWER_DATA" "" "Writing out detailed assembly data for power analysis" {  } {  } 0 115031 "Writing out detailed assembly data for power analysis" 0 0 "Assembler" 0 -1 1509576641666 ""}
+{ "Info" "IASM_ASM_GENERATING_PROGRAMMING_FILES" "" "Assembler is generating device programming files" {  } {  } 0 115030 "Assembler is generating device programming files" 0 0 "Assembler" 0 -1 1509576641710 ""}
+{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s Quartus II 64-Bit " "Quartus II 64-Bit Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "471 " "Peak virtual memory: 471 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "Quartus II" 0 -1 1509576642332 ""} { "Info" "IQEXE_END_BANNER_TIME" "Wed Nov 01 18:50:42 2017 " "Processing ended: Wed Nov 01 18:50:42 2017" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "Quartus II" 0 -1 1509576642332 ""} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "Quartus II" 0 -1 1509576642332 ""} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "Quartus II" 0 -1 1509576642332 ""}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "Assembler" 0 -1 1509576642332 ""}