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README: PMU: Optimize dts description
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1. Delete the inaccurate event mapping PMU_HW_CACHE_REFERENCES, PMU_HW_CACHE_MISSES, DTLB_READ_MISS and ITLB_READ_MISS, because no CPU can provide them directly at present
2. Modify the inaccurate event mapping PMU_HW_BRANCH_INSTRUCTIONS and PMU_HW_BRANCH_MISSES, refer to C908
3. Modify the mask bitmap to 0x7fff8, because the CPU actually only supports 18 mhpmcounters
4. Fix BPU event value
5. The raw-event id mapping is optimized into one row, ranging from 0x0 to 0xff

Signed-off-by: Chen Pei <[email protected]>
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@cp0613
cp0613 committed Nov 27, 2024
1 parent 04afa56 commit 6463c56
Showing 1 changed file with 24 additions and 77 deletions.
101 changes: 24 additions & 77 deletions README.adoc
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Expand Up @@ -377,19 +377,15 @@ vmlinux: The Linux kernel ELF file

The configuration of PMU can be referred to link:https://github.com/riscv-software-src/opensbi/blob/master/docs/pmu_support.md[OpenSBI SBI PMU extension]

The following is an example of PMU configuration for the Xuantie C-series CPU, which may need to be modified according to the datasheet during actual use.
The following is an example of PMU configuration for the Xuantie C-series CPU written according to the datasheet.
....
pmu {
compatible = "riscv,pmu";
riscv,event-to-mhpmevent =
/* PMU_HW_CACHE_REFERENCES -> ll_cache_read_access */
<0x00003 0x00000000 0x00000010>,
/* PMU_HW_CACHE_MISSES -> ll_cache_read_miss */
<0x00004 0x00000000 0x00000011>,
/* PMU_HW_BRANCH_INSTRUCTIONS -> inst_branch */
<0x00005 0x00000000 0x00000007>,
<0x00005 0x00000000 0x00000036>,
/* PMU_HW_BRANCH_MISSES -> inst_branch_mispredict */
<0x00006 0x00000000 0x00000006>,
<0x00006 0x00000000 0x00000038>,
/* PMU_HW_STALLED_CYCLES_FRONTEND -> ifu_stalled_cycle */
<0x00008 0x00000000 0x00000027>,
/* PMU_HW_STALLED_CYCLES_BACKEND -> idu_stalled_cycle */
Expand All @@ -414,80 +410,31 @@ pmu {
<0x10012 0x00000000 0x00000012>,
/* LL_WRITE_MISS -> ll_cache_write_miss */
<0x10013 0x00000000 0x00000013>,
/* DTLB_READ_MISS -> dtlb_miss */
<0x10019 0x00000000 0x00000004>,
/* ITLB_READ_MISS -> itlb_miss */
<0x10021 0x00000000 0x00000003>,
/* BPU_READ_ACCESS -> branch_direction_prediction */
<0x10030 0x00000000 0x0000001c>,
<0x10028 0x00000000 0x0000001c>,
/* BPU_READ_MISS -> branch_direction_misprediction */
<0x10031 0x00000000 0x0000001b>;
<0x10029 0x00000000 0x0000001b>;
riscv,event-to-mhpmcounters =
<0x00003 0x00003 0xfffffff8>,
<0x00004 0x00004 0xfffffff8>,
<0x00005 0x00005 0xfffffff8>,
<0x00006 0x00006 0xfffffff8>,
<0x00007 0x00007 0xfffffff8>,
<0x00008 0x00008 0xfffffff8>,
<0x00009 0x00009 0xfffffff8>,
<0x0000a 0x0000a 0xfffffff8>,
<0x10000 0x10000 0xfffffff8>,
<0x10001 0x10001 0xfffffff8>,
<0x10002 0x10002 0xfffffff8>,
<0x10003 0x10003 0xfffffff8>,
<0x10008 0x10008 0xfffffff8>,
<0x10009 0x10009 0xfffffff8>,
<0x10010 0x10010 0xfffffff8>,
<0x10011 0x10011 0xfffffff8>,
<0x10012 0x10012 0xfffffff8>,
<0x10013 0x10013 0xfffffff8>,
<0x10019 0x10019 0xfffffff8>,
<0x10021 0x10021 0xfffffff8>,
<0x10030 0x10030 0xfffffff8>,
<0x10031 0x10031 0xfffffff8>;
/* The Xuantie processor only implements 18 mhpmcounters, so the bitmap is 0x7fff8 */
<0x00005 0x00005 0x7fff8>,
<0x00006 0x00006 0x7fff8>,
<0x00008 0x00008 0x7fff8>,
<0x00009 0x00009 0x7fff8>,
<0x10000 0x10000 0x7fff8>,
<0x10001 0x10001 0x7fff8>,
<0x10002 0x10002 0x7fff8>,
<0x10003 0x10003 0x7fff8>,
<0x10008 0x10008 0x7fff8>,
<0x10009 0x10009 0x7fff8>,
<0x10010 0x10010 0x7fff8>,
<0x10011 0x10011 0x7fff8>,
<0x10012 0x10012 0x7fff8>,
<0x10013 0x10013 0x7fff8>,
<0x10028 0x10028 0x7fff8>,
<0x10029 0x10029 0x7fff8>;
riscv,raw-event-to-mhpmcounters =
<0x00000000 0x00000001 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000002 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000003 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000004 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000005 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000006 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000007 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000008 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000009 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000000a 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000000b 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000000c 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000000d 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000000e 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000000f 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000010 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000011 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000012 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000013 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000014 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000015 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000016 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000017 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000018 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000019 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000001a 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000001b 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000001c 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000001d 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000001e 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000001f 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000020 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000021 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000022 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000023 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000024 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000025 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000026 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000027 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000028 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x00000029 0xffffffff 0xffffffff 0xfffffff8>,
<0x00000000 0x0000002a 0xffffffff 0xffffffff 0xfffffff8>;
/* For raw event ID 0x0 - 0xff */
<0x0 0x0 0xffffffff 0xffffff00 0x7fff8>;
};
....

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