hw/arm/wr-arm: add virtio transports to wr-arm machine

Add a configurable number of virtio transports to wr-arm machine. Tested with virtio-net-device on vxworks, confirmed successful ping to host network and correct device initialization according to the boot args provided. Signed-off-by: Nelson Ho <[email protected]>
Wind-River · Sep 11, 2024 · 4c9e68e · 4c9e68e
1 parent 7b10565
commit 4c9e68e
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Showing 2 changed files with 34 additions and 2 deletions.
diff --git a/hw/arm/wr-arm.c b/hw/arm/wr-arm.c
@@ -38,6 +38,34 @@ static void *wr_arm_get_dtb(const struct arm_boot_info *binfo)
     return ms->fdt;
 }
 
+static void wr_arm_create_virtio_transports(MachineState *machine)
+{
+    WrArmMachineState *s = WR_ARM_MACHINE(machine);
+    const char compat[] = "virtio,mmio";
+    int num_transports = wr_memmap[WR_VIRTIO].size / WR_VIRTIO_SZ;
+    int i;
+
+    /* Create transports in reverse order so they appear in the
+     * finished device tree lowest address first. */
+    for (i = num_transports - 1; i >= 0; i--) {
+        char *name;
+        int irq = WR_VIRTIO_IRQ_BASE + i;
+        hwaddr base = wr_memmap[WR_VIRTIO].base + (i * WR_VIRTIO_SZ);
+        sysbus_create_simple("virtio-mmio", base,
+                             qdev_get_gpio_in(DEVICE(&s->gic), irq));
+
+        name = g_strdup_printf("/virtio_mmio@%" PRIx64, base);
+        qemu_fdt_add_subnode(machine->fdt, name);
+        qemu_fdt_setprop_string(machine->fdt, name, "compatible", compat);
+        qemu_fdt_setprop_sized_cells(machine->fdt, name, "reg", 2, base, 2, WR_VIRTIO_SZ);
+        qemu_fdt_setprop_cells(machine->fdt, name, "interrupts",
+                               GIC_FDT_IRQ_TYPE_SPI, irq,
+                               GIC_FDT_IRQ_FLAGS_EDGE_LO_HI);
+        qemu_fdt_setprop(machine->fdt, name, "dma-coherent", NULL, 0);
+        g_free(name);
+    }
+}
+
 static void wr_arm_create_uart(MachineState *machine)
 {
     DeviceState *dev;
@@ -346,6 +374,8 @@ static void wr_arm_init(MachineState *machine)
 
     wr_arm_create_uart(machine);
 
+    wr_arm_create_virtio_transports(machine);
+
     s->binfo.ram_size = machine->ram_size;
     if (wr_memmap[WR_LO_MEM].size) {
         s->binfo.loader_start = wr_memmap[WR_LO_MEM].base;

diff --git a/include/hw/arm/wr-arm.h b/include/hw/arm/wr-arm.h
@@ -55,7 +55,7 @@
 #define WR_UART0_IRQ_0          82
 
 /* virtio */
-#define NUM_VIRTIO_TRANSPORTS   4
+#define WR_VIRTIO_SZ            0x200
 #define WR_VIRTIO_IRQ_BASE      0x68
 
 
@@ -82,14 +82,16 @@ struct WrArmMachineState {
 OBJECT_DECLARE_SIMPLE_TYPE(WrArmMachineState, WR_ARM_MACHINE)
 
 enum {
-    WR_LO_MEM,
+    WR_VIRTIO,
     WR_UART0,
     WR_GIC_DIST,
     WR_GIC_REDIST,
+    WR_LO_MEM,
     WR_HI_MEM,
 };
 
 static const MemMapEntry wr_memmap[] = {
+    [WR_VIRTIO] =           { 0x08000000, 0x00000800 },
     [WR_UART0] =            { 0x401c8000, 0x00001000 },
     [WR_GIC_DIST] =         { 0x50800000, 0x00010000 },
     [WR_GIC_REDIST] =       { 0x50900000, 0x00200000 },