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Tests: Add process test, Kernel: Tweak address space locking
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@fido2020
fido2020 committed Oct 24, 2021
1 parent 6bd5da9 commit 1316981
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Showing 11 changed files with 208 additions and 135 deletions.
2 changes: 2 additions & 0 deletions Applications/Tests/Main.cpp
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Expand Up @@ -6,9 +6,11 @@
#include <unistd.h>

#include "Pipe.h"
#include "Terminal.h"

const std::unordered_map<std::string, Test> tests = {
{"pipe", pipeTest},
{"terminal", termTest},
};

void ExecuteTest(const Test& test) {
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45 changes: 45 additions & 0 deletions Applications/Tests/Terminal.h
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@@ -0,0 +1,45 @@
#pragma once

#include <unistd.h>
#include <stdlib.h>
#include <signal.h>

#include "Test.h"

// This more than anything is to stress the kernel
// for any deadlocks or memory issues
int RunTerminalTest() {
pid_t pids[16] = {};

const char* const argv[] = {
"/system/bin/terminal.lef",
nullptr
};

for(int i = 0; i < 16; i++){
pid_t p = fork();

if(p == 0){
execvp("/system/bin/terminal.lef", const_cast<char* const*>(argv));

exit(1); // We shouldnt be here
} else {
pids[i] = p;
}
}

usleep(1000000);

for(int i = 0; i < 16; i++){
if(kill(pids[i], SIGKILL)) {
return 1; // Process may have already died?
}
}

return 0;
}

static Test termTest = {
.func = RunTerminalTest,
.prettyName = "Terminal open/close test",
};
216 changes: 116 additions & 100 deletions Kernel/include/Arch/x86_64/CPU.h
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@@ -1,129 +1,145 @@
#pragma once

#include <stdint.h>
#include <Compiler.h>
#include <RefPtr.h>
#include <System.h>
#include <TSS.h>
#include <Thread.h>
#include <System.h>
#include <RefPtr.h>
#include <stdint.h>

class Process;
template<typename T>
class FastList;
template <typename T> class FastList;

typedef struct {
uint16_t limit;
uint64_t base;
uint16_t limit;
uint64_t base;
} __attribute__((packed)) gdt_ptr_t;

struct CPU{
CPU* self;
struct CPU {
CPU* self;
uint64_t id; // APIC/CPU id
void* gdt; // GDT
gdt_ptr_t gdtPtr;
Thread* currentThread = nullptr;
Thread* idleThread = nullptr;
Process* idleProcess;
volatile int runQueueLock = 0;
FastList<Thread*>* runQueue;
void* gdt; // GDT
gdt_ptr_t gdtPtr;
Thread* currentThread = nullptr;
Thread* idleThread = nullptr;
Process* idleProcess;
volatile int runQueueLock = 0;
FastList<Thread*>* runQueue;
tss_t tss __attribute__((aligned(16)));
};

enum {
CPUID_ECX_SSE3 = 1 << 0,
CPUID_ECX_PCLMUL = 1 << 1,
CPUID_ECX_DTES64 = 1 << 2,
CPUID_ECX_MONITOR = 1 << 3,
CPUID_ECX_DS_CPL = 1 << 4,
CPUID_ECX_VMX = 1 << 5,
CPUID_ECX_SMX = 1 << 6,
CPUID_ECX_EST = 1 << 7,
CPUID_ECX_TM2 = 1 << 8,
CPUID_ECX_SSSE3 = 1 << 9,
CPUID_ECX_CID = 1 << 10,
CPUID_ECX_FMA = 1 << 12,
CPUID_ECX_CX16 = 1 << 13,
CPUID_ECX_ETPRD = 1 << 14,
CPUID_ECX_PDCM = 1 << 15,
CPUID_ECX_PCIDE = 1 << 17,
CPUID_ECX_DCA = 1 << 18,
CPUID_ECX_SSE4_1 = 1 << 19,
CPUID_ECX_SSE4_2 = 1 << 20,
CPUID_ECX_x2APIC = 1 << 21,
CPUID_ECX_MOVBE = 1 << 22,
CPUID_ECX_POPCNT = 1 << 23,
CPUID_ECX_AES = 1 << 25,
CPUID_ECX_XSAVE = 1 << 26,
CPUID_ECX_OSXSAVE = 1 << 27,
CPUID_ECX_AVX = 1 << 28,

CPUID_EDX_FPU = 1 << 0,
CPUID_EDX_VME = 1 << 1,
CPUID_EDX_DE = 1 << 2,
CPUID_EDX_PSE = 1 << 3,
CPUID_EDX_TSC = 1 << 4,
CPUID_EDX_MSR = 1 << 5,
CPUID_EDX_PAE = 1 << 6,
CPUID_EDX_MCE = 1 << 7,
CPUID_EDX_CX8 = 1 << 8,
CPUID_EDX_APIC = 1 << 9,
CPUID_EDX_SEP = 1 << 11,
CPUID_EDX_MTRR = 1 << 12,
CPUID_EDX_PGE = 1 << 13,
CPUID_EDX_MCA = 1 << 14,
CPUID_EDX_CMOV = 1 << 15,
CPUID_EDX_PAT = 1 << 16,
CPUID_EDX_PSE36 = 1 << 17,
CPUID_EDX_PSN = 1 << 18,
CPUID_EDX_CLF = 1 << 19,
CPUID_EDX_DTES = 1 << 21,
CPUID_EDX_ACPI = 1 << 22,
CPUID_EDX_MMX = 1 << 23,
CPUID_EDX_FXSR = 1 << 24,
CPUID_EDX_SSE = 1 << 25,
CPUID_EDX_SSE2 = 1 << 26,
CPUID_EDX_SS = 1 << 27,
CPUID_EDX_HTT = 1 << 28,
CPUID_EDX_TM1 = 1 << 29,
CPUID_EDX_IA64 = 1 << 30,
CPUID_EDX_PBE = 1 << 31
CPUID_ECX_SSE3 = 1 << 0,
CPUID_ECX_PCLMUL = 1 << 1,
CPUID_ECX_DTES64 = 1 << 2,
CPUID_ECX_MONITOR = 1 << 3,
CPUID_ECX_DS_CPL = 1 << 4,
CPUID_ECX_VMX = 1 << 5,
CPUID_ECX_SMX = 1 << 6,
CPUID_ECX_EST = 1 << 7,
CPUID_ECX_TM2 = 1 << 8,
CPUID_ECX_SSSE3 = 1 << 9,
CPUID_ECX_CID = 1 << 10,
CPUID_ECX_FMA = 1 << 12,
CPUID_ECX_CX16 = 1 << 13,
CPUID_ECX_ETPRD = 1 << 14,
CPUID_ECX_PDCM = 1 << 15,
CPUID_ECX_PCIDE = 1 << 17,
CPUID_ECX_DCA = 1 << 18,
CPUID_ECX_SSE4_1 = 1 << 19,
CPUID_ECX_SSE4_2 = 1 << 20,
CPUID_ECX_x2APIC = 1 << 21,
CPUID_ECX_MOVBE = 1 << 22,
CPUID_ECX_POPCNT = 1 << 23,
CPUID_ECX_AES = 1 << 25,
CPUID_ECX_XSAVE = 1 << 26,
CPUID_ECX_OSXSAVE = 1 << 27,
CPUID_ECX_AVX = 1 << 28,

CPUID_EDX_FPU = 1 << 0,
CPUID_EDX_VME = 1 << 1,
CPUID_EDX_DE = 1 << 2,
CPUID_EDX_PSE = 1 << 3,
CPUID_EDX_TSC = 1 << 4,
CPUID_EDX_MSR = 1 << 5,
CPUID_EDX_PAE = 1 << 6,
CPUID_EDX_MCE = 1 << 7,
CPUID_EDX_CX8 = 1 << 8,
CPUID_EDX_APIC = 1 << 9,
CPUID_EDX_SEP = 1 << 11,
CPUID_EDX_MTRR = 1 << 12,
CPUID_EDX_PGE = 1 << 13,
CPUID_EDX_MCA = 1 << 14,
CPUID_EDX_CMOV = 1 << 15,
CPUID_EDX_PAT = 1 << 16,
CPUID_EDX_PSE36 = 1 << 17,
CPUID_EDX_PSN = 1 << 18,
CPUID_EDX_CLF = 1 << 19,
CPUID_EDX_DTES = 1 << 21,
CPUID_EDX_ACPI = 1 << 22,
CPUID_EDX_MMX = 1 << 23,
CPUID_EDX_FXSR = 1 << 24,
CPUID_EDX_SSE = 1 << 25,
CPUID_EDX_SSE2 = 1 << 26,
CPUID_EDX_SS = 1 << 27,
CPUID_EDX_HTT = 1 << 28,
CPUID_EDX_TM1 = 1 << 29,
CPUID_EDX_IA64 = 1 << 30,
CPUID_EDX_PBE = 1 << 31
};

typedef struct {
char vendorString[12]; // CPU vendor string
char nullTerminator = '\0'; // Acts as a terminator for the vendor string
char vendorString[12]; // CPU vendor string
char nullTerminator = '\0'; // Acts as a terminator for the vendor string

uint32_t features_ecx; // CPU features (ecx)
uint32_t features_edx; // CPU features (edx)
uint32_t features_ecx; // CPU features (ecx)
uint32_t features_edx; // CPU features (edx)
} __attribute__((packed)) cpuid_info_t;

cpuid_info_t CPUID();

inline uintptr_t GetRBP(){
volatile uintptr_t val;

asm volatile("mov %%rbp, %0" : "=r"(val));
return val;
ALWAYS_INLINE uintptr_t GetRBP() {
volatile uintptr_t val;

asm volatile("mov %%rbp, %0" : "=r"(val));
return val;
}

ALWAYS_INLINE uintptr_t GetCR3() {
volatile uintptr_t val;

asm volatile("mov %%cr3, %0" : "=r"(val));
return val;
}

inline uintptr_t GetCR3(){
volatile uintptr_t val;

asm volatile("mov %%cr3, %0" : "=r"(val));
return val;
static ALWAYS_INLINE void SetCPULocal(CPU* val) {
val->self = val;
asm volatile("wrmsr" ::"a"((uintptr_t)val & 0xFFFFFFFF) /*Value low*/,
"d"(((uintptr_t)val >> 32) & 0xFFFFFFFF) /*Value high*/, "c"(0xC0000102) /*Set Kernel GS Base*/);
asm volatile("wrmsr" ::"a"((uintptr_t)val & 0xFFFFFFFF) /*Value low*/,
"d"(((uintptr_t)val >> 32) & 0xFFFFFFFF) /*Value high*/, "c"(0xC0000101) /*Set Kernel GS Base*/);
}

static inline void SetCPULocal(CPU* val){
val->self = val;
asm volatile("wrmsr" :: "a"((uintptr_t)val & 0xFFFFFFFF) /*Value low*/, "d"(((uintptr_t)val >> 32) & 0xFFFFFFFF) /*Value high*/, "c"(0xC0000102) /*Set Kernel GS Base*/);
asm volatile("wrmsr" :: "a"((uintptr_t)val & 0xFFFFFFFF) /*Value low*/, "d"(((uintptr_t)val >> 32) & 0xFFFFFFFF) /*Value high*/, "c"(0xC0000101) /*Set Kernel GS Base*/);
static ALWAYS_INLINE CPU* GetCPULocal() {
CPU* ret;
int intEnable = CheckInterrupts();
asm("cli");
asm volatile("swapgs; movq %%gs:0, %0; swapgs;"
: "=r"(ret)); // CPU info is 16-byte aligned as per liballoc alignment
if (intEnable)
asm("sti");
return ret;
}

__attribute__((always_inline)) static inline CPU* GetCPULocal(){
CPU* ret;
int intEnable = CheckInterrupts();
asm("cli");
asm volatile("swapgs; movq %%gs:0, %0; swapgs;" : "=r"(ret)); // CPU info is 16-byte aligned as per liballoc alignment
if(intEnable)
asm("sti");
return ret;
}
class InterruptDisabler {
public:
ALWAYS_INLINE InterruptDisabler() : m_intsWereEnabled(CheckInterrupts()) { asm volatile("cli"); }
ALWAYS_INLINE ~InterruptDisabler() {
if (m_intsWereEnabled) {
asm volatile("sti");
}
}

private:
bool m_intsWereEnabled = false;
};
2 changes: 1 addition & 1 deletion Kernel/include/Arch/x86_64/Compiler.h
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Expand Up @@ -5,4 +5,4 @@
#include <stddef.h>
ALWAYS_INLINE void* operator new(size_t, void* p){
return p;
}
}
2 changes: 1 addition & 1 deletion Kernel/include/Arch/x86_64/Paging.h
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Expand Up @@ -163,5 +163,5 @@ inline void SetPageFlags(uint64_t* page, uint64_t flags) { *page |= flags; }

inline uint32_t GetPageFrame(uint64_t p) { return (p & PAGE_FRAME) >> 12; }

inline void invlpg(uintptr_t addr) { asm("invlpg (%0)" ::"r"(addr)); }
inline void invlpg(uintptr_t addr) { asm volatile("invlpg (%0)" ::"r"(addr)); }
} // namespace Memory
39 changes: 19 additions & 20 deletions Kernel/include/Arch/x86_64/System.h
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Expand Up @@ -4,16 +4,16 @@

#include <stdint.h>

extern "C"{
void outportb(uint16_t port, uint8_t value);
void outportw(uint16_t port, uint16_t value);
void outportd(uint16_t port, uint32_t value);
void outportl(uint16_t port, uint32_t value);

uint8_t inportb(uint16_t port);
uint16_t inportw(uint16_t port);
uint32_t inportd(uint16_t port);
uint32_t inportl(uint16_t port);
extern "C" {
void outportb(uint16_t port, uint8_t value);
void outportw(uint16_t port, uint16_t value);
void outportd(uint16_t port, uint32_t value);
void outportl(uint16_t port, uint32_t value);

uint8_t inportb(uint16_t port);
uint16_t inportw(uint16_t port);
uint32_t inportd(uint16_t port);
uint32_t inportl(uint16_t port);
}

struct RegisterContext {
Expand Down Expand Up @@ -42,22 +42,21 @@ struct RegisterContext {
typedef struct {
uint16_t fcw; // FPU Control Word
uint16_t fsw; // FPU Status Word
uint8_t ftw; // FPU Tag Words
uint8_t ftw; // FPU Tag Words
uint8_t zero; // Literally just contains a zero
uint16_t fop; // FPU Opcode
uint64_t rip;
uint64_t rdp;
uint32_t mxcsr; // SSE Control Register
uint32_t mxcsrMask; // SSE Control Register Mask
uint8_t st[8][16]; // FPU Registers, Last 6 bytes reserved
uint32_t mxcsr; // SSE Control Register
uint32_t mxcsrMask; // SSE Control Register Mask
uint8_t st[8][16]; // FPU Registers, Last 6 bytes reserved
uint8_t xmm[16][16]; // XMM Registers
} __attribute__((packed)) fx_state_t;


static inline int CheckInterrupts(){
static inline int CheckInterrupts() {
unsigned long flags;
asm volatile ( "pushf;"
"pop %%rax;"
: "=a"(flags) :: "cc" );
asm volatile("pushf;"
"pop %%rax;"
: "=a"(flags)::"cc");
return (flags & 0x200);
}
}
1 change: 1 addition & 0 deletions Kernel/include/RefPtr.h
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Expand Up @@ -2,6 +2,7 @@

#include <Debug.h>
#include <TTraits.h>
#include <Assert.h>

#ifdef REFPTR_DEBUG
#include <Logging.h>
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