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[Bug] Riviera-PRO component binding not working between libraries #1073

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SzymonHitachi opened this issue Nov 20, 2024 · 0 comments
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@SzymonHitachi
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Using tsfpga assume that I have 1 VHDL file myfile.vhd and 1 IP TCL file with mycomponent.

  • During simulation IP file is being compiled in a separate project and by default it ends in xil_defaultlib library
  • VHDL file has a component instantiation of that IP

During the simulation now, In Riviera-PRO, simulator does not bind the generated IP properly to the component:

# ELBREAD: Warning: ELBREAD_0037 myfile.vhd (505): Instance "/mycomponent_inst" of component "mycomponent" not bound.

Solution discussion:
This seems to be easily fixed by updating vunit/sim_if/rivierapro.py -> _create_load_function by adding:

        for library in self._libraries:
            vsim_flags += ["-L", library.name]

which is added in modelsim also.

This however results in significant increase of simulation time (increasing with the amount of tcl IPs) on start of elaboration with warnings for each of the IPs:

# ELBREAD: Warning: Entity "xil_defaultlib.mycomponent" has been compiled after architecture "work.myfile(rtl)" that instantiates and binds this entity at simulation initialization. Recompile the source files in the correct order to perform the binding operation during compilation and simultaneously reduce the time required to initialize the simulation.

Note: Same warning does not show up for modelsim.

What would be the actual good way of solving this issue?

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