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add test_r11_r1b
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Thaumy committed Mar 20, 2024
1 parent a66d018 commit cfbfac4
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Showing 3 changed files with 75 additions and 2 deletions.
16 changes: 16 additions & 0 deletions Cargo.lock

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1 change: 1 addition & 0 deletions Cargo.toml
Original file line number Diff line number Diff line change
Expand Up @@ -44,6 +44,7 @@ build = "build/main.rs"
bindgen = "0.68.1"

[dependencies]
simsimd = "4.0.0"
memmap2 = "0.9.3"
libc = "0.2.148"
page_size = "0.6.0"
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60 changes: 58 additions & 2 deletions src/perf_event/counting/group/tests/hardware.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,9 +12,11 @@
// You should have received a copy of the GNU Lesser General Public License along with Perf-event-rs. If not,
// see <https://www.gnu.org/licenses/>.

use crate::counting::group::tests::test_group;
use simsimd::SpatialSimilarity;
use crate::counting::group::tests::{gen_group, test_group};
use crate::counting::Config;
use crate::test::cpu_workload;
use crate::{Event, HardwareEvent};
use crate::{Event, EventScope, HardwareEvent, RawEvent};

#[test]
fn test_ipc() {
Expand All @@ -24,3 +26,57 @@ fn test_ipc() {

test_group(&Event::from(ev_1), &Event::from(ev_2), &mut workload);
}

#[test]
fn test_raw() {
let mut group = gen_group();

let configs = [
0x11, // r11
0x1b, // r1b
0x70, // r70
0x71, // r71
0x73, // r73
0x75, // r75
0x8004, // r8004
];

let scopes = EventScope::all();

let guards = configs.map(|config| {
let event = unsafe { RawEvent::new(config) };
let mut config = Config::new(&event.into(), &scopes);
group.add_member(&mut config).unwrap()
});

let fixed_group = group.enable().unwrap();

cpu_workload();
let vector_a: Vec<f32> = vec![1.0, 2.0, 3.0];
let vector_b: Vec<f32> = vec![4.0, 5.0, 6.0];

// Compute the cosine similarity between vector_a and vector_b
let _ = f32::cosine(&vector_a, &vector_b)
.expect("Vectors must be of the same length");

fixed_group.disable().unwrap();

#[rustfmt::skip]
let [
r11,
r1b,
r70,
r71,
r73,
r75,
r8004
] = guards.map(|mut guard| guard.stat().unwrap().event_count);

dbg!(r11);
dbg!(r1b);
dbg!(r70);
dbg!(r71);
dbg!(r73);
dbg!(r75);
dbg!(r8004);
}

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