-
Notifications
You must be signed in to change notification settings - Fork 13
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Complete sn32f2xx support, add functionality #5
Conversation
this is platform dependent - not implemented in all platforms
and bail if any part fails
we should parse pages, not kb size
we're actually doing code option table checks here
sometimes we poll too fast. Check if the device is busy and retry
hopefully this fixes memory corruption
Woops, vscode had a fart and each suggestion was sent individually, sorry.... Still, lgtm, just some formatting suggestion.... |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Minor nitpick for the description of PR - this doesn't cover all the SN32F200 chips. It doesn't take into account SN32f239 and SN32f229. Not suggesting it's necessary to support them, just that the description could be adjusted.
write_buffer_16(buf + 6, CS0); // WARNING THIS SETS CS0 | ||
if (!hid_set_feature(dev, buf, REPORT_SIZE)) return false; | ||
if (!hid_get_feature(dev, buf, CMD_SET_ENCRYPTION_ALGO)) return false; | ||
clear_buffer(buf, REPORT_SIZE); |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Useless clearing of local stack buffer which is about to go out of scope. Same thing in next few functions.
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Mostly being extra careful with buffer management here while implementing undocumented bits of the protocol
Mostly avoided them because of bad/missing docs. However, looking at it again the protocol is compatible and they're simply a revision of 240
That also means the version check atm is buggy, since it will identify 230 and 220 chips as 240 ( issues arising from this are related to flash size on erase/program). Definitely a nice find, will amend |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
Looks good enough for me.
With which chips has the new code been actually tested?
Testing being done on specific platform samples |
There was a problem hiding this comment.
Choose a reason for hiding this comment
The reason will be displayed to describe this comment to others. Learn more.
240 series work good on latest commit.
If flashing gets interrupted while the device is receiving the firmware, it will stay in program mode. Inform the user about it
Supports all sn32f2xx chips
Add options for flash erase, CS re/set and data verification
Simplify and correct the protocol usage
Automagic chip identification, no longer VID/PID bound