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learning_make0/Makefile

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+blah: blah.c
+	cc blah.c -o blah

learning_make0/blah.c

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+int main(void){
+	return 0;
+}

learning_make1/Makefile

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+blah: blah.o
+	cc blah.o -o blah # Runs third
+
+blah.o: blah.c
+	cc -c blah.c -o blah.o # Runs second
+
+# Typically blah.c would already exist, but I want to limit any additional required files
+blah.c:
+	echo "int main() { return 0; }" > blah.c # Runs first

learning_make1/blah.c

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+int main() { return 0; }

learning_make2/Makefile

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+some: other
+	echo "hi gogoli"
+	touch some
+other:
+	echo "im first"

learning_make3/Makefile

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+some_file: other_file
+	echo "This will always run, and runs second"
+	touch some_file
+
+other_file:
+	echo "This will always run, and runs first"

learning_make4/Makefile

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+#defining vars , vars can only be string
+file := file1 file2
+some_file : $(file)
+	echo "some file is called " $(file) 
+	touch some_file
+file1:
+	touch file1
+file2:
+	touch file2
+clean:
+	rm -f file1 file2 some_file

learning_make5/Makefile

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+#rename the file or dir is possible with this syntax :
+# mv {current name of the file} {new name of the file}
+# remove :
+# rm -f {file name}
+
+a := "something"
+b := 'something'
+c := something
+var_test:
+	echo "a is " $(a)
+	echo "b is " $(b)
+	echo "c is " $(c)
+	echo 'b is ' $(b)
+
+# just run make to see what it prints

learning_make6/Makefile

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+#from the prev example we saw there is no diff between "' but check this example out
+
+a := hi
+b := 'hi'
+c := "hi"
+test:
+	printf $a
+	printf $b 
+	printf $c 

learning_make7/Makefile

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+#as you know in when you run the make command without specifying the target , it will run
+#the first target , if you want to without specifying the target it runs some of the targets
+#you can do so by creating a target which calls others
+all: one two three
+
+one:
+	touch one
+two:
+	touch two
+three:
+	touch three
+clean:
+	rm -f one two three

learning_make8/Makefile

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+#when you want to do the same thing for each target , you dont have to write the same things many time
+#just do this
+
+all : f0.o f1.o
+
+f0.o f1.o:
+	echo $@
+# run the following , you will get what @ means here

learning_make9/Makefile

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+# % and * are both wildcard
+# * searches file system for what we want
+# Print out file information about every .c file
+
+#uncomment this later
+#all: create print
+#create:
+#	echo "int main(){return0;}" > test.c
+
+print: $(wildcard *.c)
+	ls -l  $?
+#if wildcard is not used , it will stay at *.c if no file found