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Makefile

@@ -1,10 +1,17 @@
 dier := learning_make
 all:
 	@echo Hello this is Makefile tour of examples
-	@for number in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21; do \
+	@for number in 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28; do \
 		echo example $$number :;\
 		echo Makefile :;\
-		cd $(dier)$$number && cat Makefile && echo $~ && echo $~ && echo $~ && echo the result of running : && make && echo $~ && echo $~ && echo $~ && echo files in dir $: && ls -l && echo $~ && echo $~ && echo $~ && cd ..;\
+		cd $(dier)$$number ;\
+	       	cat Makefile ;\
+	       	echo $~ && echo $~ && echo $~ ;\
+	       	echo the result of running : && make -i;\
+	       	echo $~ && echo $~ echo $~ ;\
+	       	echo files in dir $: && ls -l ;\
+	       	echo $~ && echo $~ && echo $~ ;\
+	       	cd ..;\
 		read -p "Enter smth to go to next example : " value;\
 	done
 

learning_make22/Makefile

@@ -0,0 +1,32 @@
+# if you need to call make for another makefile in your make file use $(MAKE) to pass all the flags to that process
+
+new_contents = "hello:\n\ttouch inside_file"
+all:
+	mkdir -p subdir
+	# the > sign means to write to that output stream , here its our new makefile
+	printf $(new_contents) | sed -e 's/^ //' > subdir/makefile
+	# sed :
+	# sed is used to search file and replace the unwanted text with wanted text
+	# sed -flag 's/old_text/new_text/flag'
+	# ^ in the sed means from begining of a line , so it checks first of each line
+	cd subdir && $(MAKE)
+	@echo so what this make file did in subdir ?lets see it
+	@cd subdir;\
+		echo cd subdir;\
+		echo ls -l;\
+		ls -l;\
+		echo inside of each file: ;\
+		echo makefile: ;\
+		fout makefile;\
+		# if you dont have fout :
+		# cat makefile
+		echo $~$~;\
+		echo inside_file: ;\
+		#if you dont have fout :
+		# cat makefile
+		fout inside_file;\
+		echo $~$~
+
+clean:
+	rm -rf subdir
+

learning_make22/subdir/makefile

@@ -0,0 +1,2 @@
+hello:
+	touch inside_file

learning_make23/Makefile

@@ -0,0 +1,12 @@
+.EXPORT_ALL_VARIABLES:
+# this like exports all of vars
+# when calling make there are env vars which exists b4 you call make , make creates make vars from all of them
+
+#creating env var :
+export env_var_g='saeed'
+
+all:
+	echo value of env_var_g as env var = $$env_var_g
+	echo value of env_var_g as make var = $(env_var_g)
+
+

learning_make24/Makefile

@@ -0,0 +1,35 @@
+# defining var with = and := :
+def_1=saeed $(later)
+def_2:=saeed $(later)
+
+later:=later
+
+# appending to a var
+appended:=abbas
+appended+=saeed
+
+#setting var if its not set
+def_1?=amir
+def_3?=amir
+
+with_spaces = hello   # with_spaces has many spaces after "hello"
+after = $(with_spaces)there
+
+nullstring =
+space = $(nullstring) # Make a variable with a single space.
+
+# undef var == an empty str
+
+all:
+	# see the diff
+	echo $(def_1)
+	echo $(def_2)
+	echo $(appended)
+	# set or not set intializing result
+	echo $(def_1)
+	echo $(def_3)
+	# result of spaces
+	echo $(with_spaces)
+	echo $(after)
+	echo $(nullstrin)
+	echo $(space)

learning_make25/Makefile

@@ -0,0 +1,12 @@
+#running with commandline arg var
+# make var=value
+# if you want to change their values you have to use override keyword
+
+override var = test
+var0=1
+
+all:
+	echo $(var)
+	#does not change the command line value
+	echo $(var0)
+

learning_make26/Makefile

@@ -0,0 +1,44 @@
+# https://www.gnu.org/software/make/manual/html_node/Canned-Recipes.html#Canned-Recipes
+# each line in make will be processed in new shell
+# and each new shell has its own env vars 
+# so the line below will work fine
+one = export blah="I was set!"; echo $$blah
+
+# the line below wont echo blah
+# because its set for another shell
+# so it does not exist here
+# but saeed will be printed
+define two
+export blah="I was set!"
+echo $$blah
+echo saeed
+endef
+
+# define is used like a lambdas here
+
+all: first second
+	@echo "This prints 'I was set'"
+	@$(one)
+	@echo "This does not print 'I was set' because each command runs in a separate shell"
+	@$(two)
+	# look at the lines below , there are similar to two
+	@export alpha="abbas"
+	@echo $$alpha
+	# line below is same as one
+	@export alpha="abbas";echo $$alpha
+
+# in make you can create variables only for one target , remember define creates variables , like lambdas in cpp
+first: var=saeed
+
+# you can also create vars pattern like
+fi%: var0=abbas
+
+first:
+	# var is defined for target first so everything is alright
+	echo $(var)
+	echo $(var0)
+
+second:
+	# var is not defined for second so :
+	echo $(var)
+	echo $(var0)

learning_make27/Makefile

@@ -0,0 +1,54 @@
+
+
+
+
+foo = ok
+
+nullstring =
+boo = $(nullstring) # end of line; there is a space here
+
+bar =
+doo = $(bar)
+
+all:
+	echo $(MAKEFLAGS)
+	echo $(findstring i ,$(MAKEFLAGS))
+# checking to see if wanted flags are passed for running makefile
+# MAKEFLAGS keeps all the flags in it as make var
+ifneq (,$(findstring i, $(MAKEFLAGS)))
+	echo "i was passed to MAKEFLAGS"
+endif
+# checking to see if wanted flags are passed for running makefile
+# MAKEFLAGS keeps all the flags in it as make var
+ifneq (,$(findstring i ,$(MAKEFLAGS)))
+	echo "i was passed to MAKEFLAGS"
+endif
+
+
+
+# there is no must to write these type of if conditions inside of the target def
+# ifdef does not expand variable references; it just sees if something is defined at all
+ifdef doo
+	echo "doo is defined"
+endif
+ifndef bar
+	echo "but bar is not"
+endif
+
+
+# checking if empty or not
+ifeq ($(strip $(boo)),)
+	echo "boo is empty after being stripped"
+endif
+ifeq ($(nullstring),)
+	echo "nullstring doesn't even have spaces"
+endif
+
+
+# checking if defined or not
+ifeq ($(foo), ok)
+	echo "foo equals ok"
+else
+	echo "nope"
+endif
+

learning_make28/Makefile

@@ -0,0 +1,15 @@
+# https://www.gnu.org/software/make/manual/html_node/General-Search.html
+# https://www.gnu.org/software/make/manual/html_node/Functions.html
+# https://www.gnu.org/software/make/manual/html_node/Special-Targets.html
+
+foo := a.o b.o l.a c.o
+one := $(patsubst %.o,%.c,$(foo))
+# This is a shorthand for the above
+two := $(foo:%.o=%.c)
+# This is the suffix-only shorthand, and is also equivalent to the above.
+three := $(foo:.o=.c)
+
+all:
+	echo $(one)
+	echo $(two)
+	echo $(three)