My changes to address arch= functionality. It is incomplete, but very close (I believe) Validation is happening. #33
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
…ertion We inserted the gcall of .SAT_ADD before the gsi_start_bb for avoiding the ssa def after use ICE issue. Unfortunately, there will be the potential ICE when the first stmt is label. We cannot insert the gcall before the label. Thus, we take gsi_after_labels to locate the 'really' stmt that the gcall will insert before. The existing test cases pr115387-1.c and pr115387-2.c cover this change. The below test suites are passed for this patch. * The rv64gcv fully regression test with newlib. * The x86 regression test. * The x86 bootstrap test. gcc/ChangeLog: * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children): Leverage gsi_after_labels instead of gsi_start_bb to skip the leading labels of bb. Signed-off-by: Pan Li <[email protected]>
gcc: PR target/69374 * doc/install.texi (Specific) <*-*-cygwin>: Update web link.
Properly handle zero and sign extension for Armv8-M.baseline as Cortex-M23 can have the security extension active. Currently, there is an internal compiler error on Cortex-M23 for the epilog processing of sign extension. This patch addresses the following CVE-2024-0151 for Armv8-M.baseline. gcc/ChangeLog: PR target/115253 * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear): Sign extend for Thumb1. (thumb1_expand_prologue): Add zero/sign extend. Signed-off-by: Torbjörn SVENSSON <[email protected]> Co-authored-by: Yvan ROUX <[email protected]>
For Armv8.1-M, the clearing of the registers is handled differently than for Armv8-M, so update the test case accordingly. gcc/testsuite/ChangeLog: PR target/115253 * gcc.target/arm/cmse/extend-return.c: Update test case condition for Armv8.1-M. Signed-off-by: Torbjörn SVENSSON <[email protected]> Co-authored-by: Yvan ROUX <[email protected]>
Given the lack of support for the LSE128 instructions in all but the the most up-to-date version of Binutils (2.42), having the build-time test for assembler support for these instructions often leads to the building of Libatomic without support for LSE128-dependent atomic function implementations. This ultimately leads to different people having different versions of Libatomic on their machines, depending on which assembler was available at compilation time. Furthermore, the conditional inclusion of these atomic function implementations predicated on assembler support leads to a series of `#if HAVE_FEAT_LSE128' guards scattered throughout the codebase and the need for a series of aliases when the feature flag evaluates to false. The preprocessor macro guards, together with the conditional aliasing leads to code that is cumbersome to understand and maintain. Both of the issues highlighted above will only get worse with the coming support for LRCPC3 atomics which under the current scheme will also require build-time checks. Consequently, a better option for both consistency across builds and code cleanness is to make recourse to the `.inst' directive. By replacing all novel assembly instructions for their hexadecimal representation within `.inst's, we ensure that the Libatomic code is both considerably cleaner and all machines build the same binary, irrespective of binutils version available at compile time. This patch therefore removes all configure checks for LSE128-support in the assembler and all the guards and aliases that were associated with `HAVE_FEAT_LSE128' libatomic/ChangeLog: * acinclude.m4 (LIBAT_TEST_FEAT_AARCH64_LSE128): Delete. * auto-config.h.in (HAVE_FEAT_LSE128): Likewise * config/linux/aarch64/atomic_16.S: Replace all LSE128 instructions with equivalent `.inst' directives. (HAVE_FEAT_LSE128): Remove all references. * configure: Regenerate. * configure.ac: Remove call to LIBAT_TEST_FEAT_AARCH64_LSE128.
In order to facilitate the fine-tuning of how `libatomic_i.h' and `host-config.h' headers are used by different atomic functions, we define distinct identifier macros for each file which, in implementing atomic operations, imports these headers. The idea is that different parts of these headers could then be conditionally defined depending on the macros set by the file that `#include'd them. Given how it is possible that some file names are generic enough that using them as-is for macro names (e.g. flag.c -> FLAG) may potentially lead to name clashes with other macros, all file names first have LAT_ prepended to them such that, for example, flag.c is assigned the LAT_FLAG macro. Libatomic/ChangeLog: * cas_n.c (LAT_CAS_N): New. * exch_n.c (LAT_EXCH_N): Likewise. * fadd_n.c (LAT_FADD_N): Likewise. * fand_n.c (LAT_FAND_N): Likewise. * fence.c (LAT_FENCE): Likewise. * fenv.c (LAT_FENV): Likewise. * fior_n.c (LAT_FIOR_N): Likewise. * flag.c (LAT_FLAG): Likewise. * fnand_n.c (LAT_FNAND_N): Likewise. * fop_n.c (LAT_FOP_N): Likewise * fsub_n.c (LAT_FSUB_N): Likewise. * fxor_n.c (LAT_FXOR_N): Likewise. * gcas.c (LAT_GCAS): Likewise. * gexch.c (LAT_GEXCH): Likewise. * glfree.c (LAT_GLFREE): Likewise. * gload.c (LAT_GLOAD): Likewise. * gstore.c (LAT_GSTORE): Likewise. * load_n.c (LAT_LOAD_N): Likewise. * store_n.c (LAT_STORE_N): Likewise. * tas_n.c (LAT_TAS_N): Likewise.
By querying previously-defined file-identifier macros, `host-config.h' is able to get information about its environment and, based on this information, select more appropriate function-specific ifunc selectors. This reduces the number of unnecessary feature tests that need to be carried out in order to find the best atomic implementation for a function at run-time. An immediate benefit of this is that we can further fine-tune the architectural requirements for each atomic function without risk of incurring the maintenance and runtime-performance penalties of having to maintain an ifunc selector with a huge number of alternatives, most of which are irrelevant for any particular function. Consequently, for AArch64 targets, we relax the architectural requirements of `compare_exchange_16', which now requires only LSE as opposed to the newer LSE2. The new flexibility provided by this approach also means that certain functions can now be called directly, doing away with ifunc selectors altogether when only a single implementation is available for it on a given target. As per the macro expansion framework laid out in `libatomic_i.h', such functions should have their names prefixed with `__atomic_' as opposed to `libat_'. This is the same prefix applied to function names when Libatomic is configured with `--disable-gnu-indirect-function'. To achieve this, these functions unconditionally apply the aliasing rule that at present is conditionally applied only when libatomic is built without ifunc support, which ensures that the default `libat_##NAME' is accessible via the equivalent `__atomic_##NAME' too. This is ensured by using the new `ENTRY_ALIASED' macro. Finally, this means we are able to do away with a whole set of function aliases that were needed until now, thus considerably cleaning up the implementation. libatomic/ChangeLog: * config/linux/aarch64/atomic_16.S: Remove unnecessary aliasing. (LSE): New. (ENTRY_ALIASED): Likewise. * config/linux/aarch64/host-config.h (LSE_ATOP): New. (LSE2_ATOP): Likewise. (LSE128_ATOP): Likewise. (IFUNC_COND_1): Make its definition conditional on above 3 macros. (IFUNC_NCOND): Likewise.
At present, `atomic_16.S' groups different implementations of the same functions together in the file. Therefore, as an example, the LSE2 implementation of `load_16' follows on immediately from its core implementation, as does the `store_16' LSE2 implementation. Such architectural extension-dependent implementations are dependent on ifunc support, such that they are guarded by the relevant preprocessor macro, i.e. `#if HAVE_IFUNC'. Having to apply these guards on a per-function basis adds unnecessary clutter to the file and makes its maintenance more error-prone. We therefore reorganize the layout of the file in such a way that all core implementations needing no `#ifdef's are placed first, followed by all ifunc-dependent implementations, which can all be guarded by a single `#if HAVE_IFUNC', greatly reducing the overall number of required `#ifdef' macros. libatomic/ChangeLog: * config/linux/aarch64/atomic_16.S: Reorganize functions in file. (HAVE_FEAT_LSE2): Delete.
…move We were comparing a mode size with word_mode, but word_mode is an enum value thus this does not really make any sense. (Un)luckily E_DImode happens to be 8 so this seemed to work, but let's make it correct so it won't blow up when we add LA32 support or add another machine mode... gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_expand_conditional_move): Compare mode size with UNITS_PER_WORD instead of word_mode.
A move/bstrins pair is as fast as a (addi.w|lu12i.w|lu32i.d|lu52i.d)/and pair, and twice fast as a srli/slli pair. When the src reg and the dst reg happens to be the same, the move instruction can be optimized away. gcc/ChangeLog: * config/loongarch/predicates.md (high_bitmask_operand): New predicate. * config/loongarch/constraints.md (Yy): New constriant. * config/loongarch/loongarch.md (and<mode>3_align): New define_insn_and_split. gcc/testsuite/ChangeLog: * gcc.target/loongarch/bstrins-1.c: New test. * gcc.target/loongarch/bstrins-2.c: New test.
Various pretty_printer instances are named "buffer", but a pretty_printer *has* a buffer, rather than *is* a buffer. For example, pp_buffer (buffer)->digit_buffer is referring to "buffer"'s buffer's digit_buffer. This mechanical patch renames such variables to "pp", which I find much clearer; the above becomes: pp_buffer (pp)->digit_buffer i.e. "pp's buffer's digit_buffer". No functional change intended. Signed-off-by: David Malcolm <[email protected]> gcc/c-family/ChangeLog: * c-ada-spec.cc: Rename pretty_printer "buffer" to "pp" throughout. gcc/ChangeLog: * gimple-pretty-print.cc: Rename pretty_printer "buffer" to "pp" throughout. * print-tree.cc (print_node): Likewise. * tree-loop-distribution.cc (dot_rdg_1): Likewise. * tree-pretty-print.h (dump_location): Likewise. * value-range.cc (vrange::dump): Likewise. (irange_bitmask::dump): Likewise. Signed-off-by: David Malcolm <[email protected]>
No functional change intended. gcc/analyzer/ChangeLog: * access-diagram.cc (access_range::dump): Update for fields of pretty_printer becoming private. * call-details.cc (call_details::dump): Likewise. * call-summary.cc (call_summary::dump): Likewise. (call_summary_replay::dump): Likewise. * checker-event.cc (checker_event::debug): Likewise. * constraint-manager.cc (range::dump): Likewise. (bounded_range::dump): Likewise. (constraint_manager::dump): Likewise. * engine.cc (exploded_node::dump): Likewise. (exploded_path::dump): Likewise. (exploded_path::dump_to_file): Likewise. * feasible-graph.cc (feasible_graph::dump_feasible_path): Likewise. * program-point.cc (program_point::dump): Likewise. * program-state.cc (extrinsic_state::dump_to_file): Likewise. (sm_state_map::dump): Likewise. (program_state::dump_to_file): Likewise. * ranges.cc (symbolic_byte_offset::dump): Likewise. (symbolic_byte_range::dump): Likewise. * record-layout.cc (record_layout::dump): Likewise. * region-model-reachability.cc (reachable_regions::dump): Likewise. * region-model.cc (region_to_value_map::dump): Likewise. (region_model::dump): Likewise. (model_merger::dump): Likewise. * region-model.h (one_way_id_map<T>::dump): Likewise. * region.cc (region_offset::dump): Likewise. (region::dump): Likewise. * sm-malloc.cc (deallocator_set::dump): Likewise. * store.cc (uncertainty_t::dump): Likewise. (binding_key::dump): Likewise. (bit_range::dump): Likewise. (byte_range::dump): Likewise. (binding_map::dump): Likewise. (binding_cluster::dump): Likewise. (store::dump): Likewise. * supergraph.cc (supergraph::dump_dot_to_file): Likewise. (superedge::dump): Likewise. * svalue.cc (svalue::dump): Likewise. gcc/c-family/ChangeLog: * c-ada-spec.cc (dump_ads): Update for fields of pretty_printer becoming private. * c-pretty-print.cc: Likewise throughout. gcc/c/ChangeLog: * c-objc-common.cc (print_type): Update for fields of pretty_printer becoming private. (c_tree_printer): Likewise. gcc/cp/ChangeLog: * cxx-pretty-print.cc: Update throughout for fields of pretty_printer becoming private. * error.cc: Likewise. gcc/ChangeLog: * diagnostic.cc (diagnostic_context::urls_init): Update for fields of pretty_printer becoming private. (diagnostic_context::print_any_cwe): Likewise. (diagnostic_context::print_any_rules): Likewise. (diagnostic_context::print_option_information): Likewise. * diagnostic.h (diagnostic_format_decoder): Likewise. (diagnostic_prefixing_rule): Likewise, fixing typo. * digraph.cc (test_dump_to_dot): Likewise. * digraph.h (digraph<GraphTraits>::dump_dot_to_file): Likewise. * dumpfile.cc (dump_pretty_printer::emit_any_pending_textual_chunks): Likewise. * gimple-pretty-print.cc (print_gimple_stmt): Likewise. (print_gimple_expr): Likewise. (print_gimple_seq): Likewise. (dump_ssaname_info_to_file): Likewise. (gimple_dump_bb): Likewise. * graph.cc (print_graph_cfg): Likewise. (start_graph_dump): Likewise. * langhooks.cc (lhd_print_error_function): Likewise. * lto-wrapper.cc (print_lto_docs_link): Likewise. * pretty-print.cc (pp_set_real_maximum_length): Convert to... (pretty_printer::set_real_maximum_length): ...this. (pp_clear_state): Convert to... (pretty_printer::clear_state): ...this. (pp_wrap_text): Update for pp_remaining_character_count_for_line becoming a member function. (urlify_quoted_string): Update for fields of pretty_printer becoming private. (pp_format): Convert to... (pretty_printer::format): ...this. Reduce the scope of local variables "old_line_length" and "old_wrapping_mode" and make const. Reduce the scope of locals "args", "new_chunk_array", "curarg", "any_unnumbered", and "any_numbered". (pp_output_formatted_text): Update for fields of pretty_printer becoming private. (pp_flush): Likewise. (pp_really_flush): Likewise. (pp_set_line_maximum_length): Likewise. (pp_set_prefix): Convert to... (pretty_printer::set_prefix): ...this. (pp_take_prefix): Update for fields of pretty_printer gaining "m_" prefixes. (pp_destroy_prefix): Likewise. (pp_emit_prefix): Convert to... (pretty_printer::emit_prefix): ...this. (pretty_printer::pretty_printer): Update both ctors for fields gaining "m_" prefixes. (pretty_printer::~pretty_printer): Likewise for dtor. (pp_append_text): Update for pp_emit_prefix becoming pretty_printer::emit_prefix. (pp_remaining_character_count_for_line): Convert to... (pretty_printer::remaining_character_count_for_line): ...this. (pp_character): Update for above change. (pp_maybe_space): Convert to... (pretty_printer::maybe_space): ...this. (pp_begin_url): Convert to... (pretty_printer::begin_url): ...this. (get_end_url_string): Update for fields of pretty_printer becoming private. (pp_end_url): Convert to... (pretty_printer::end_url): ...this. (selftest::test_pretty_printer::test_pretty_printer): Update for fields of pretty_printer becoming private. (selftest::test_urls): Likewise. (selftest::test_null_urls): Likewise. (selftest::test_urlification): Likewise. * pretty-print.h (pp_line_cutoff): Convert from macro to inline function. (pp_prefixing_rule): Likewise. (pp_wrapping_mode): Likewise. (pp_format_decoder): Likewise. (pp_needs_newline): Likewise. (pp_indentation): Likewise. (pp_translate_identifiers): Likewise. (pp_show_color): Likewise. (pp_buffer): Likewise. (pp_get_prefix): Add forward decl to allow friend decl. (pp_take_prefix): Likewise. (pp_destroy_prefix): Likewise. (class pretty_printer): Fix typo in leading comment. Add "friend" decls for the various new accessor functions that were formerly macros and for pp_get_prefix, pp_take_prefix, and pp_destroy_prefix. Make all fields private. (pretty_printer::set_output_stream): New. (pretty_printer::set_prefix): New decl. (pretty_printer::emit_prefix): New decl. (pretty_printer::format): New decl. (pretty_printer::maybe_space): New decl. (pretty_printer::supports_urls_p): New. (pretty_printer::get_url_format): New. (pretty_printer::set_url_format): New. (pretty_printer::begin_url): New decl. (pretty_printer::end_url): New decl. (pretty_printer::set_verbatim_wrapping): New. (pretty_printer::set_padding): New. (pretty_printer::get_padding): New. (pretty_printer::clear_state): New decl. (pretty_printer::set_real_maximum_length): New decl. (pretty_printer::remaining_character_count_for_line): New decl. (pretty_printer::buffer): Rename to... (pretty_printer::m_buffer): ...this. (pretty_printer::prefix): Rename to... (pretty_printer::m_prefix): ...this; (pretty_printer::padding): Rename to... (pretty_printer::m_padding): ...this; (pretty_printer::maximum_length): Rename to... (pretty_printer::m_maximum_length): ...this; (pretty_printer::indent_skip): Rename to... (pretty_printer::m_indent_skip): ...this; (pretty_printer::wrapping): Rename to... (pretty_printer::m_wrapping): ...this; (pretty_printer::format_decoder): Rename to... (pretty_printer::m_format_decoder): ...this; (pretty_printer::emitted_prefix): Rename to... (pretty_printer::m_emitted_prefix): ...this; (pretty_printer::need_newline): Rename to... (pretty_printer::m_need_newline): ...this; (pretty_printer::translate_identifiers): Rename to... (pretty_printer::m_translate_identifiers): ...this; (pretty_printer::show_color): Rename to... (pretty_printer::m_show_color): ...this; (pretty_printer::url_format): Rename to... (pretty_printer::m_url_format): ...this; (pp_get_prefix): Reformat. (pp_format_postprocessor): New inline function. (pp_take_prefix): Move decl to before class pretty_printer. (pp_destroy_prefix): Likewise. (pp_set_prefix): Convert to inline function. (pp_emit_prefix): Convert to inline function. (pp_format): Convert to inline function. (pp_maybe_space): Convert to inline function. (pp_begin_url): Convert to inline function. (pp_end_url): Convert to inline function. (pp_set_verbatim_wrapping): Convert from macro to inline function, renaming... (pp_set_verbatim_wrapping_): ...this. * print-rtl.cc (dump_value_slim): Update for fields of pretty_printer becoming private. (dump_insn_slim): Likewise. (dump_rtl_slim): Likewise. * print-tree.cc (print_node): Likewise. * sched-rgn.cc (dump_rgn_dependencies_dot): Likewise. * text-art/canvas.cc (canvas::print_to_pp): Likewise. (canvas::debug): Likewise. (selftest::test_canvas_urls): Likewise. * text-art/dump.h (dump_to_file): Likewise. * text-art/selftests.cc (selftest::assert_canvas_streq): Likewise. * text-art/style.cc (style::print_changes): Likewise. * text-art/styled-string.cc (styled_string::from_fmt_va): Likewise. * tree-diagnostic-path.cc (control_flow_tests): Update for pp_show_color becoming an inline function. * tree-loop-distribution.cc (dot_rdg_1): Update for fields of pretty_printer becoming private. * tree-pretty-print.cc (maybe_init_pretty_print): Likewise. * value-range.cc (vrange::dump): Likewise. (irange_bitmask::dump): Likewise. gcc/fortran/ChangeLog: * error.cc (gfc_clear_pp_buffer): Likewise. (gfc_warning): Likewise. (gfc_warning_check): Likewise. (gfc_error_opt): Likewise. (gfc_error_check): Likewise. gcc/jit/ChangeLog: * jit-recording.cc (recording::function::dump_to_dot): Update for fields of pretty_printer becoming private. gcc/testsuite/ChangeLog: * gcc.dg/plugin/analyzer_cpython_plugin.c (dump_refcnt_info): Update for fields of pretty_printer becoming private. Signed-off-by: David Malcolm <[email protected]>
No functional change intended. gcc/cp/ChangeLog: * error.cc (append_formatted_chunk): Move part of body into chunk_info::append_formatted_chunk. gcc/ChangeLog: * dumpfile.cc (dump_pretty_printer::emit_items): Update for changes to chunk_info. * pretty-print.cc (chunk_info::append_formatted_chunk): New, based on code in cp/error.cc's append_formatted_chunk. (chunk_info::pop_from_output_buffer): New, based on code in pp_output_formatted_text and dump_pretty_printer::emit_items. (on_begin_quote): Convert to... (chunk_info::on_begin_quote): ...this. (on_end_quote): Convert to... (chunk_info::on_end_quote): ...this. (pretty_printer::format): Update for chunk_info becoming a class and its fields gaining "m_" prefixes. Update for on_begin_quote and on_end_quote moving to chunk_info. (quoting_info::handle_phase_3): Update for changes to chunk_info. (pp_output_formatted_text): Likewise. Move cleanup code to chunk_info::pop_from_output_buffer. * pretty-print.h (class output_buffer): New forward decl. (class urlifier): New forward decl. (struct chunk_info): Convert to... (class chunk_info): ...this. Add friend class pretty_printer. (chunk_info::get_args): New accessor. (chunk_info::get_quoting_info): New accessor. (chunk_info::append_formatted_chunk): New decl. (chunk_info::pop_from_output_buffer): New decl. (chunk_info::on_begin_quote): New decl. (chunk_info::on_end_quote): New decl. (chunk_info::prev): Rename to... (chunk_info::m_prev): ...this. (chunk_info::args): Rename to... (chunk_info::m_args): ...this. (output_buffer::cur_chunk_array): Drop "struct" from decl. Signed-off-by: David Malcolm <[email protected]>
…061]
At present the autovectorizer fails to vectorize simple loops
involving calls to `__builtin_prefetch'. A simple example of such
loop is given below:
void foo(double * restrict a, double * restrict b, int n){
int i;
for(i=0; i<n; ++i){
a[i] = a[i] + b[i];
__builtin_prefetch(&(b[i+8]));
}
}
The failure stems from two issues:
1. Given that it is typically not possible to fully reason about a
function call due to the possibility of side effects, the
autovectorizer does not attempt to vectorize loops which make such
calls.
Given the memory reference passed to `__builtin_prefetch', in the
absence of assurances about its effect on the passed memory
location the compiler deems the function unsafe to vectorize,
marking it as clobbering memory in `vect_find_stmt_data_reference'.
This leads to the failure in autovectorization.
2. Notwithstanding the above issue, though the prefetch statement
would be classed as `vect_unused_in_scope', the loop invariant that
is used in the address of the prefetch is the scalar loop's and not
the vector loop's IV. That is, it still uses `i' and not `vec_iv'
because the instruction wasn't vectorized, causing DCE to think the
value is live, such that we now have both the vector and scalar loop
invariant actively used in the loop.
This patch addresses both of these:
1. About the issue regarding the memory clobber, data prefetch does
not generate faults if its address argument is invalid and does not
write to memory. Therefore, it does not alter the internal state
of the program or its control flow under any circumstance. As
such, it is reasonable that the function be marked as not affecting
memory contents.
To achieve this, we add the necessary logic to
`get_references_in_stmt' to ensure that builtin functions are given
given the same treatment as internal functions. If the gimple call
is to a builtin function and its function code is
`BUILT_IN_PREFETCH', we mark `clobbers_memory' as false.
2. Finding precedence in the way clobber statements are handled,
whereby the vectorizer drops these from both the scalar and
vectorized versions of a given loop, we choose to drop prefetch
hints in a similar fashion. This seems appropriate given how
software prefetch hints are typically ignored by processors across
architectures, as they seldom lead to performance gain over their
hardware counterparts.
gcc/ChangeLog:
PR tree-optimization/114061
* tree-data-ref.cc (get_references_in_stmt): set
`clobbers_memory' to false for __builtin_prefetch.
* tree-vect-loop.cc (vect_transform_loop): Drop all
__builtin_prefetch calls from loops.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/vect-prefetch-drop.c: New test.
* gcc.target/aarch64/vect-prefetch-drop.c: Likewise.
Using memset is incorrect if the __bucket_ptr type is non-trivial, or does not use an all-zero bit pattern for its null value. Replace the three uses of memset with std::fill_n to set the pointers to nullptr. libstdc++-v3/ChangeLog: * include/bits/hashtable.h (_Hashtable::clear): Do not use memset to zero out bucket pointers. (_Hashtable::_M_assign_elements): Likewise.
The shift operations for dynamic_bitset fail to zero out words where the non-zero bits were shifted to a completely different word. For a right shift we don't need to sanitize the unused bits in the high word, because we know they were already clear and a right shift doesn't change that. libstdc++-v3/ChangeLog: PR libstdc++/115399 * include/tr2/dynamic_bitset (operator>>=): Remove redundant call to _M_do_sanitize. * include/tr2/dynamic_bitset.tcc (_M_do_left_shift): Zero out low bits in words that should no longer be populated. (_M_do_right_shift): Likewise for high bits. * testsuite/tr2/dynamic_bitset/pr115399.cc: New test.
No semantics changes. gcc/cp/ChangeLog: * cp-tree.h (extract): Add new overload to return tree. * parser.cc (cp_parser_asm_string_expression): Use tree extract. * semantics.cc (cexpr_str::extract): Add new overload to return tree.
…al_p for truncating casts [PR115449] As mentioned by Jeff in r15-831-g05daf617ea22e1d818295ed2d037456937e23530, we don't handle `(X | Y) & ~Y` -> `X & ~Y` on the gimple level when there are some different signed (but same precision) types dealing with matching `~Y` with the `Y` part. This improves both gimple_bitwise_equal_p and gimple_bitwise_inverted_equal_p to be able to say `(truncate)a` and `(truncate)a` are bitwise_equal and that `~(truncate)a` and `(truncate)a` are bitwise_invert_equal. Bootstrapped and tested on x86_64-linux-gnu with no regressions. PR tree-optimization/115449 gcc/ChangeLog: * gimple-match-head.cc (gimple_maybe_truncate): New declaration. (gimple_bitwise_equal_p): Match truncations that differ only in types with the same precision. (gimple_bitwise_inverted_equal_p): For matching after bit_not_with_nop call gimple_bitwise_equal_p. * match.pd (maybe_truncate): New match pattern. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/bitops-10.c: New test. Signed-off-by: Andrew Pinski <[email protected]>
Bitreverse rtl code was added with r14-1586-g6160572f8d243c. So let's use it instead of an unspec. This is just a small cleanup but it does have one small fix with respect to rtx costs which didn't handle vector modes correctly for the UNSPEC and now it does. This is part of the first step in adding __builtin_bitreverse's builtins but it is independent of it though. Bootstrapped and tested on aarch64-linux-gnu with no regressions. gcc/ChangeLog: PR target/115176 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode><vczle><vczbe>): Use bitreverse instead of unspec. * config/aarch64/aarch64-sve-builtins-base.cc (svrbit): Convert over to using rtx_code_function instead of unspec_based_function. * config/aarch64/aarch64-sve.md: Update comment where RBIT is included. * config/aarch64/aarch64.cc (aarch64_rtx_costs): Handle BITREVERSE like BSWAP. Remove UNSPEC_RBIT support. * config/aarch64/aarch64.md (unspec): Remove UNSPEC_RBIT. (aarch64_rbit<mode>): Use bitreverse instead of unspec. * config/aarch64/iterators.md (SVE_INT_UNARY): Add bitreverse. (optab): Likewise. (sve_int_op): Likewise. (SVE_INT_UNARY): Remove UNSPEC_RBIT. (optab): Likewise. (sve_int_op): Likewise. (min_elem_bits): Likewise. Signed-off-by: Andrew Pinski <[email protected]>
There's a large number of atomic related testcases in the riscv folder. Move them into a subfolder similar to what was done for rvv testcases. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo-table-a-6-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-6.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-7.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-1.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-2.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-3.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-4.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-5.c: ...here. * gcc.target/riscv/amo-table-a-6-load-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-load-1.c: ...here. * gcc.target/riscv/amo-table-a-6-load-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-load-2.c: ...here. * gcc.target/riscv/amo-table-a-6-load-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-load-3.c: ...here. * gcc.target/riscv/amo-table-a-6-store-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-store-1.c: ...here. * gcc.target/riscv/amo-table-a-6-store-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-store-2.c: ...here. * gcc.target/riscv/amo-table-a-6-store-compat-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-1.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-2.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-3.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-4.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-5.c: ...here. * gcc.target/riscv/amo-table-ztso-load-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-load-1.c: ...here. * gcc.target/riscv/amo-table-ztso-load-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-load-2.c: ...here. * gcc.target/riscv/amo-table-ztso-load-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-load-3.c: ...here. * gcc.target/riscv/amo-table-ztso-store-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-store-1.c: ...here. * gcc.target/riscv/amo-table-ztso-store-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-store-2.c: ...here. * gcc.target/riscv/amo-table-ztso-store-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-store-3.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c: ...here. * gcc.target/riscv/amo-zaamo-preferred-over-zalrsc.c: Move to... * gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c: ...here. * gcc.target/riscv/inline-atomics-1.c: Move to... * gcc.target/riscv/amo/inline-atomics-1.c: ...here. * gcc.target/riscv/inline-atomics-2.c: Move to... * gcc.target/riscv/amo/inline-atomics-2.c: ...here. * gcc.target/riscv/inline-atomics-3.c: Move to... * gcc.target/riscv/amo/inline-atomics-3.c: ...here. * gcc.target/riscv/inline-atomics-4.c: Move to... * gcc.target/riscv/amo/inline-atomics-4.c: ...here. * gcc.target/riscv/inline-atomics-5.c: Move to... * gcc.target/riscv/amo/inline-atomics-5.c: ...here. * gcc.target/riscv/inline-atomics-6.c: Move to... * gcc.target/riscv/amo/inline-atomics-6.c: ...here. * gcc.target/riscv/inline-atomics-7.c: Move to... * gcc.target/riscv/amo/inline-atomics-7.c: ...here. * gcc.target/riscv/inline-atomics-8.c: Move to... * gcc.target/riscv/amo/inline-atomics-8.c: ...here. * gcc.target/riscv/pr114130.c: Move to... * gcc.target/riscv/amo/pr114130.c: ...here. * gcc.target/riscv/pr89835.c: Move to... * gcc.target/riscv/amo/pr89835.c: ...here. * gcc.target/riscv/amo/amo.exp: New file. Signed-off-by: Patrick O'Neill <[email protected]>
Update __atomic_add_fetch arguments to be a pointer and value rather than two pointers. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c: Update __atomic_add_fetch args. * gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c: Ditto. Signed-off-by: Patrick O'Neill <[email protected]>
We artifically restrict the temp registers to be a[0-9]+ when other registers like t[0-9]+ are valid too. Update to make the regex accept any register for the temp value. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo/amo-table-a-6-load-1.c: Update temp register regex. * gcc.target/riscv/amo/amo-table-a-6-load-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-load-3.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-store-1.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-store-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-load-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-load-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-load-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-store-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-store-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-store-3.c: Ditto. Signed-off-by: Patrick O'Neill <[email protected]>
I missed this target-specific usage of pretty_printer::buffer when making the fields private in r15-1209-gc5e3be456888aa; sorry. gcc/ChangeLog: PR bootstrap/115465 * config/aarch64/aarch64-early-ra.cc (early_ra::process_block): Update for fields of pretty_printer becoming private in r15-1209-gc5e3be456888aa. Signed-off-by: David Malcolm <[email protected]>
This patch removes trailing whitespace and replaces leading groups of 8-16 spaces with tabs. gcc/testsuite/ChangeLog: * lib/target-supports.exp: Cleanup whitespace.
The r15-1180 adjustments to this testcase broke a couple of tests in C++26 mode. gcc/testsuite/ChangeLog: * g++.dg/cpp26/static_assert1.C: Fix diagnostic typos.
exception_ptr.h contains
namespace __exception_ptr
{
class exception_ptr;
}
using __exception_ptr::exception_ptr;
so when module std tries to 'export using std::exception_ptr', it names
another using-directive rather than the class directly, so __exception_ptr
is never explicitly opened in module purview.
gcc/cp/ChangeLog:
* module.cc (depset::hash::add_binding_entity): Set
DECL_MODULE_PURVIEW_P instead of asserting.
gcc/testsuite/ChangeLog:
* g++.dg/modules/using-20_a.C: New test.
A sample implementation of module std was breaking because the exports included 'using std::operator&' twice. Since Nathaniel's r15-964 for PR114867, the first using added an extra instance of each function that was revealed/exported by that using, resulting in duplicates for lookup_maybe_add to dedup. But if the duplicate is the first thing in the list, lookup_add doesn't make an OVERLOAD, so trying to set OVL_USING_P crashes. Fixed by using ovl_make in the case where we want to set the flag. gcc/cp/ChangeLog: * tree.cc (lookup_maybe_add): Use ovl_make when setting OVL_USING_P. gcc/testsuite/ChangeLog: * g++.dg/modules/using-21_a.C: New test.
Tests involving float128_t were xfailed or otherwise worked around for vxworks on aarch64. The same issue came up on rtems. This patch adjusts them similarly. for libstdc++-v3/ChangeLog * testsuite/20_util/from_chars/8.cc: Skip float128_t testing on aarch64-rtems*. * testsuite/20_util/to_chars/float128_c++23.cc: Xfail run on aarch64-rtems*.
Some c++23 tests fail on targets that don't satisfy dg-require-cmath, because referenced math functions don't get declared in std. Add the missing requirement. for libstdc++-v3/ChangeLog * testsuite/26_numerics/headers/cmath/constexpr_std_c++23.cc: Require cmath. * testsuite/26_numerics/headers/cmath/functions_std_c++23.cc: Likewise. * testsuite/26_numerics/headers/cmath/nextafter_c++23.cc: Likewise.
Like with alias templates, it seems we don't maintain visibility flags for concepts either, so min_vis_expr_r should ignore them for now. Otherwise after r14-6789 we may incorrectly give a function template that uses a concept-id in its signature internal linkage. PR c++/115283 gcc/cp/ChangeLog: * decl2.cc (min_vis_expr_r) <case TEMPLATE_DECL>: Ignore concepts. gcc/testsuite/ChangeLog: * g++.dg/template/linkage5.C: New test. Reviewed-by: Jason Merrill <[email protected]>
Since these were already aliases just make it clear on that. gcc/ChangeLog: * config/aarch64/aarch64-cores.def: Add comment saying thunderxt81/t83 are aliases of octeontx81/83. Signed-off-by: Andrew Pinski <[email protected]>
Applied the wrong patch which didn't have the final testsuite adjustment to skip -Os on the new test. Fixed thusly. Pushed to the trunk. gcc/testsuite * gcc.target/riscv/zbs-ext-2.c: Do not run for -Os.
On rv32 targets, vwsll_zext1_scalar_<mode> would trigger an ice in maybe_legitimize_instruction when zero extending a uint32 to uint64 due to a mismatch between the input operand's mode (DI) and the expanded insn operand's mode (Pmode == SI). Ensure that mode of the operands match gcc/ChangeLog: * config/riscv/autovec-opt.md: Fix mode mismatch Signed-off-by: Edwin Lu <[email protected]> Co-authored-by: Robin Dapp <[email protected]>
When emitting insns, we have an early assertion to ensure the input operand's mode and the expanded operand's mode are the same; however, it does not perform this check if the pattern does not have an explicit machine mode specifying the operand. In this scenario, it will always assume that mode = Pmode to correctly satisfy the maybe_legitimize_operand check, however, there may be problems when working in 32 bit environments. Make the assert unconditional and replace it with an internal error for more descriptive logging gcc/ChangeLog: * config/riscv/riscv-v.cc: Move assert out of conditional block Signed-off-by: Edwin Lu <[email protected]> Co-authored-by: Robin Dapp <[email protected]>
Signed-off-by: Ramana Radhakrishnan <[email protected]> * MAINTAINERS: Update my email address.
After the middle-end support the form 11 of unsigned SAT_SUB and
the RISC-V backend implement the SAT_SUB for vector mode, add
more test case to cover the form 11.
Form 11:
#define DEF_SAT_U_SUB_FMT_11(T) \
T __attribute__((noinline)) \
sat_u_sub_##T##_fmt_11 (T x, T y) \
{ \
T ret; \
bool overflow = __builtin_sub_overflow (x, y, &ret); \
return overflow ? 0 : ret; \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/sat_u_sub-41.c: New test.
* gcc.target/riscv/sat_u_sub-42.c: New test.
* gcc.target/riscv/sat_u_sub-43.c: New test.
* gcc.target/riscv/sat_u_sub-44.c: New test.
* gcc.target/riscv/sat_u_sub-run-41.c: New test.
* gcc.target/riscv/sat_u_sub-run-42.c: New test.
* gcc.target/riscv/sat_u_sub-run-43.c: New test.
* gcc.target/riscv/sat_u_sub-run-44.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 12 of unsigned SAT_SUB and
the RISC-V backend implement the SAT_SUB for vector mode, add
more test case to cover the form 12.
Form 12:
#define DEF_SAT_U_SUB_FMT_12(T) \
T __attribute__((noinline)) \
sat_u_sub_##T##_fmt_12 (T x, T y) \
{ \
T ret; \
bool overflow = __builtin_sub_overflow (x, y, &ret); \
return !overflow ? ret : 0; \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/sat_arith.h: Add helper macro for
testing.
* gcc.target/riscv/sat_u_sub-45.c: New test.
* gcc.target/riscv/sat_u_sub-46.c: New test.
* gcc.target/riscv/sat_u_sub-47.c: New test.
* gcc.target/riscv/sat_u_sub-48.c: New test.
* gcc.target/riscv/sat_u_sub-run-45.c: New test.
* gcc.target/riscv/sat_u_sub-run-46.c: New test.
* gcc.target/riscv/sat_u_sub-run-47.c: New test.
* gcc.target/riscv/sat_u_sub-run-48.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 2 of unsigned SAT_ADD and
the RISC-V backend implement the .SAT_ADD for vector mode, add
more test case to cover the form 2.
Form 2:
#define DEF_VEC_SAT_U_ADD_FMT_2(T) \
void __attribute__((noinline)) \
vec_sat_u_add_##T##_fmt_2 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = (T)(x + y) >= x ? (x + y) : -1; \
} \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-5.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-6.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-7.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-8.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-5.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-6.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-7.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-8.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 3 of unsigned SAT_ADD and
the RISC-V backend implement the .SAT_ADD for vector mode, add
more test case to cover the form 3.
Form 3:
#define DEF_VEC_SAT_U_ADD_FMT_3(T) \
void __attribute__((noinline)) \
vec_sat_u_add_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
T ret; \
T overflow = __builtin_add_overflow (x, y, &ret); \
out[i] = (T)(-overflow) | ret; \
} \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-10.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-11.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-12.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-9.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-10.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-11.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-12.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-9.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 4 of unsigned SAT_ADD and
the RISC-V backend implement the .SAT_ADD for vector mode, add
more test case to cover the form 4.
Form 4:
#define DEF_VEC_SAT_U_ADD_FMT_4(T) \
void __attribute__((noinline)) \
vec_sat_u_add_##T##_fmt_4 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
T ret; \
out[i] = __builtin_add_overflow (x, y, &ret) ? -1 : ret; \
} \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-13.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-14.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-15.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-16.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-13.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-14.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-15.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-16.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 5 of unsigned SAT_ADD and
the RISC-V backend implement the .SAT_ADD for vector mode, add
more test case to cover the form 5.
Form 5:
#define DEF_VEC_SAT_U_ADD_FMT_5(T) \
void __attribute__((noinline)) \
vec_sat_u_add_##T##_fmt_5 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
T ret; \
out[i] = __builtin_add_overflow (x, y, &ret) == 0 ? ret : -1; \
} \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-17.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-18.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-19.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-20.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-17.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-18.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-19.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-20.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 6 of unsigned SAT_ADD and
the RISC-V backend implement the .SAT_ADD for vector mode, add
more test case to cover the form 6.
Form 6:
#define DEF_VEC_SAT_U_ADD_FMT_6(T) \
void __attribute__((noinline)) \
vec_sat_u_add_##T##_fmt_6 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = x <= (T)(x + y) ? (x + y) : -1; \
} \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-21.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-22.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-23.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-24.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-21.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-22.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-23.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-24.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 7 of unsigned SAT_ADD and
the RISC-V backend implement the .SAT_ADD for vector mode, add
more test case to cover the form 7.
Form 7:
#define DEF_VEC_SAT_U_ADD_FMT_7(T) \
void __attribute__((noinline)) \
vec_sat_u_add_##T##_fmt_7 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = (T)(x + y) < x ? -1 : (x + y); \
} \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-25.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-26.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-27.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-28.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-25.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-26.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-27.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-28.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 8 of unsigned SAT_ADD and
the RISC-V backend implement the .SAT_ADD for vector mode, add
more test case to cover the form 8.
Form 8:
#define DEF_VEC_SAT_U_ADD_FMT_8(T) \
void __attribute__((noinline)) \
vec_sat_u_add_##T##_fmt_8 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = x > (T)(x + y) ? -1 : (x + y); \
} \
}
Passed the rv64gcv regression tests.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add helper
macro for testing.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-29.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-30.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-31.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-32.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-29.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-30.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-31.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_add-run-32.c: New test.
Signed-off-by: Pan Li <[email protected]>
The previous constant synthesis logic had some issues that were non-fatal but worth considering: - It didn't work with DFmode literals, because those were cast to SImode rather SFmode when splitting into two natural-width words by split_double(). - It didn't work with large literals when TARGET_AUTO_LITPOOLS was enabled, because those were relaxed MOVI immediates rather references to literal pool entries, - It didn't take into account that when literals with the same RTL representation are pooled multiple times within a function, those entries are shared (especially important when optimizing for size). This patch addresses the above issues by making appropriate tweaks to the constant synthesis logic. gcc/ChangeLog: * config/xtensa/xtensa-protos.h (xtensa_constantsynth): Change the second argument from HOST_WIDE_INT to rtx. * config/xtensa/xtensa.cc (#include): Add "context.h" and "pass_manager.h". (machine_function): Add a new hash_map field "litpool_usage". (xtensa_constantsynth): Make "src" (the second operand) accept RTX literal instead of its value, and treat both bare and pooled SI/SFmode literals equally by bit-exact canonicalization into CONST_INT RTX internally. And then, make avoid synthesis if such multiple identical canonicalized literals are found in same function when optimizing for size. Finally, for literals where synthesis is not possible or has been avoided, re-emit "move" RTXes with canonicalized ones to increase the chances of sharing literal pool entries. * config/xtensa/xtensa.md (split patterns for constant synthesis): Change to simply invoke xtensa_constantsynth() as mentioned above, and add new patterns for when TARGET_AUTO_LITPOOLS is enabled.
PR fortran/90076 gcc/fortran/ChangeLog: * trans-decl.cc (gfc_generate_function_code): Set vptr for results to declared class type. * trans-expr.cc (gfc_reset_vptr): Allow to provide the typespec instead of the expression. * trans.h (gfc_reset_vptr): Same. gcc/testsuite/ChangeLog: * gfortran.dg/class_76.f90: Add declared vtab occurrence. * gfortran.dg/class_78.f90: New test.
The following adds a correctness check to the combined store/reduce vectorization. * gcc.dg/vect/bb-slp-32.c: Add check for correctness.
When dlopen and pthread_create are in libc the variable is set to "none required", therefore running configure will show the following errors: ./configure: line 8997: test: too many arguments ./configure: line 8999: test: too many arguments ./configure: line 9003: test: too many arguments ./configure: line 9005: test: =: unary operator expected gcc/configure also has a similar problem on gcc_cv_as_mips_explicit_relocs: ./gcc/configure: line 30242: test: =: unary operator expected ChangeLog: * configure.ac: Quote variable result of AC_SEARCH_LIBS. * configure: Regenerate. gcc/ChangeLog: * configure.ac: Add missing quotation of variable gcc_cv_as_mips_explicit_relocs. * configure: Regenerate. Signed-off-by: Collin Funk <[email protected]>
I caused some new warnings with -Wsystem-headers with my recent changes to std::get_temporary_buffer and std::_Temporary_buffer. There's a -Wsign-compare warning which can be avoided by casting the ptrdiff_t argument to size_t (which also conveniently rejects negative values). There's also a -Wdeprecated-declarations warning because I moved where std::get_temporary_buffer is called, but didn't move the diagnostic pragmas that suppress the warning for calling it. libstdc++-v3/ChangeLog: * include/bits/stl_tempbuf.h (__get_temporary_buffer): Cast argument to size_t to handle negative values and suppress -Wsign-compare warning. (_Temporary_buffer): Move diagnostic pragmas to new location of call to std::get_temporary_buffer.
After the middle-end support the form 3 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 3:
#define DEF_VEC_SAT_U_SUB_FMT_3(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_3 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = x > y ? x - y : 0; \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-10.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-11.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-12.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-9.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-10.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-11.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-12.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-9.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 4 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 4:
#define DEF_VEC_SAT_U_SUB_FMT_4(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_4 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = x >= y ? x - y : 0; \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-13.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-14.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-15.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-16.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-13.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-14.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-15.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-16.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 5 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 5:
#define DEF_VEC_SAT_U_SUB_FMT_5(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_5 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = x < y ? 0 : x - y; \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-17.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-18.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-19.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-20.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-17.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-18.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-19.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-20.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 6 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 6:
#define DEF_VEC_SAT_U_SUB_FMT_6(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_6 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
out[i] = x <= y ? 0 : x - y; \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-21.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-22.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-23.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-24.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-21.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-22.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-23.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-24.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 7 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 7:
#define DEF_VEC_SAT_U_SUB_FMT_7(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_7 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
T ret; \
T overflow = __builtin_sub_overflow (x, y, &ret); \
out[i] = ret & (T)(overflow - 1); \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-25.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-26.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-27.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-28.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-25.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-26.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-27.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-28.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 8 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 8:
#define DEF_VEC_SAT_U_SUB_FMT_8(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_8 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
T ret; \
T overflow = __builtin_sub_overflow (x, y, &ret); \
out[i] = ret & (T)-(!overflow); \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-29.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-30.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-31.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-32.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-29.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-30.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-31.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-32.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 9 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 9:
#define DEF_VEC_SAT_U_SUB_FMT_9(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_9 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
T ret; \
bool overflow = __builtin_sub_overflow (x, y, &ret); \
out[i] = overflow ? 0 : ret; \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-33.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-34.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-35.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-36.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-33.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-34.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-35.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-36.c: New test.
Signed-off-by: Pan Li <[email protected]>
After the middle-end support the form 10 of unsigned SAT_SUB and
the RISC-V backend implement the .SAT_SUB for vector mode, thus
add more test case to cover that.
Form 10:
#define DEF_VEC_SAT_U_SUB_FMT_10(T) \
void __attribute__((noinline)) \
vec_sat_u_sub_##T##_fmt_10 (T *out, T *op_1, T *op_2, unsigned limit) \
{ \
unsigned i; \
for (i = 0; i < limit; i++) \
{ \
T x = op_1[i]; \
T y = op_2[i]; \
T ret; \
bool overflow = __builtin_sub_overflow (x, y, &ret); \
out[i] = !overflow ? ret : 0; \
} \
}
Passed the rv64gcv regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/vec_sat_arith.h: Add test macro.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-37.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-38.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-39.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-40.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-37.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-38.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-39.c: New test.
* gcc.target/riscv/rvv/autovec/binop/vec_sat_u_sub-run-40.c: New test.
Signed-off-by: Pan Li <[email protected]>
The correct variable name is ac_cv_search_pthread_create ChangeLog: PR bootstrap/115453 * configure.ac: Fix typo ac_cv_search_pthread_crate. * configure: Regnerate.
this will be my commit for what i was able to accomplish for arch= I believe it is right on the edge of working fully
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Thanks for taking the time to contribute to GCC! Please be advised that if you are
viewing this on
github.com, that the mirror there is unofficial and unmonitored.The GCC community does not use
github.comfor their contributions. Instead, we usea mailing list (
[email protected]) for code submissions, code reviews, andbug reports. Please send patches there instead.