Merge remote-tracking branch 'upstream/master'

Robbbert · Jun 5, 2024 · b920c1b · b920c1b
2 parents 4a50ff4 + 39827f3
commit b920c1b
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Showing 76 changed files with 12,615 additions and 4,108 deletions.
diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua
@@ -1474,6 +1474,23 @@ if opt_tool(CPUS, "PIC16C62X") then
 	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/pic16c62x/16c62xdsm.h")
 end
 
+--------------------------------------------------
+-- Microchip PIC16x8x
+--@src/devices/cpu/pic16x8x/pic16x8x.h,CPUS["PIC16X8X"] = true
+--------------------------------------------------
+
+if CPUS["PIC16X8X"] then
+	files {
+		MAME_DIR .. "src/devices/cpu/pic16x8x/pic16x8x.cpp",
+		MAME_DIR .. "src/devices/cpu/pic16x8x/pic16x8x.h",
+	}
+end
+
+if opt_tool(CPUS, "PIC16X8X") then
+	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/pic16x8x/16x8xdsm.cpp")
+	table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/pic16x8x/16x8xdsm.h")
+end
+
 --------------------------------------------------
 -- Generic PIC16 - Disassembler only
 --@src/devices/cpu/pic16/pic16.h,CPUS["PIC16"] = true
@@ -2958,6 +2975,18 @@ if (CPUS["Z80"]~=null or CPUS["KC80"]~=null) then
 		MAME_DIR .. "src/devices/cpu/z80/z84c015.cpp",
 		MAME_DIR .. "src/devices/cpu/z80/z84c015.h",
 	}
+
+	dependency {
+		{ MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/z80.hxx" },
+		{ MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/z80_rop.hxx" },
+		{ MAME_DIR .. "src/devices/cpu/z80/z80.cpp", GEN_DIR .. "emu/cpu/z80/z80_ncs800rop.hxx" },
+	}
+
+	custombuildtask {
+		{ MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/z80.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating Z80 source file...",   PYTHON .. "  $(1) $(<) $(@)" } },
+		{ MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/z80_rop.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating Z80 \\(rop\\) source file...",   PYTHON .. " $(1) rop $(<) $(@)" } },
+		{ MAME_DIR .. "src/devices/cpu/z80/z80.lst", GEN_DIR .. "emu/cpu/z80/z80_ncs800rop.hxx", { MAME_DIR .. "src/devices/cpu/z80/z80make.py" }, { "@echo Generating NSC800 \\(rop\\) source file...",   PYTHON .. " $(1) ncs800rop $(<) $(@)" } },
+	}
 end
 
 if CPUS["KC80"] then

diff --git a/src/devices/bus/saitek_osa/maestro.cpp b/src/devices/bus/saitek_osa/maestro.cpp
@@ -339,37 +339,41 @@ ROM_START( maestro )
 	ROMX_LOAD("m6c_807c_u2.u2", 0x0000, 0x8000, CRC(57c34b4d) SHA1(1f436687f90b1afd4646e90d5617cf05c4465c98), ROM_BIOS(1))
 	ROMX_LOAD("b6c_721_u3.u3",  0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(1))
 
-	// C (C and above are shared Maestro/Analyst)
-	ROM_SYSTEM_BIOS(2, "c1", "Maestro C (set 1)")
-	ROMX_LOAD("m6l_b30d_u2.u2", 0x0000, 0x8000, CRC(bb10e15c) SHA1(7b0fb987c49da76a03b46c80d2b4eacaa785ee75), ROM_BIOS(2))
-	ROMX_LOAD("b6c_721_u3.u3",  0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(2))
+	ROM_SYSTEM_BIOS(2, "b3", "Maestro B (set 3)")
+	ROMX_LOAD("m6c_530_u2.u2",  0x0000, 0x8000, CRC(a8be85d8) SHA1(a7fb2b6a185bd5b355b3ba78439332a25c456773), ROM_BIOS(2))
+	ROMX_LOAD("b6c_528a_u3.u3", 0x8000, 0x8000, CRC(c03dfe60) SHA1(efbc9abd5e93f51d5c49376c3fd7c87ee4ede82b), ROM_BIOS(2))
 
-	ROM_SYSTEM_BIOS(3, "c2", "Maestro C (set 2)")
-	ROMX_LOAD("m6l_b30b_u2.u2", 0x0000, 0x8000, CRC(4b5026d7) SHA1(9715a0220c1bd3456480104f1c7ae61cbf1a1d73), ROM_BIOS(3))
+	// C (C and above are shared Maestro/Analyst)
+	ROM_SYSTEM_BIOS(3, "c1", "Maestro C (set 1)")
+	ROMX_LOAD("m6l_b30d_u2.u2", 0x0000, 0x8000, CRC(bb10e15c) SHA1(7b0fb987c49da76a03b46c80d2b4eacaa785ee75), ROM_BIOS(3))
 	ROMX_LOAD("b6c_721_u3.u3",  0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(3))
 
-	ROM_SYSTEM_BIOS(4, "c3", "Maestro C (set 3)")
-	ROMX_LOAD("m6l_b25_u2.u2",  0x0000, 0x8000, CRC(217ae56c) SHA1(27ec80d0f82723c2710e2ccb477705934a4c2119), ROM_BIOS(4))
+	ROM_SYSTEM_BIOS(4, "c2", "Maestro C (set 2)")
+	ROMX_LOAD("m6l_b30b_u2.u2", 0x0000, 0x8000, CRC(4b5026d7) SHA1(9715a0220c1bd3456480104f1c7ae61cbf1a1d73), ROM_BIOS(4))
 	ROMX_LOAD("b6c_721_u3.u3",  0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(4))
 
-	// D
-	ROM_SYSTEM_BIOS(5, "d1", "Maestro D (set 1)")
-	ROMX_LOAD("ma3_714a_u2.u2", 0x0000, 0x8000, CRC(435e1e30) SHA1(0d82df7c40443cb341dacebdf65f33c3e03bce70), ROM_BIOS(5))
-	ROMX_LOAD("b6m_b15_u3.u3",  0x8000, 0x8000, CRC(6155de90) SHA1(bb5cdf061dde2d1dc7925d455891c3ade1d274e3), ROM_BIOS(5))
+	ROM_SYSTEM_BIOS(5, "c3", "Maestro C (set 3)")
+	ROMX_LOAD("m6l_b25_u2.u2",  0x0000, 0x8000, CRC(217ae56c) SHA1(27ec80d0f82723c2710e2ccb477705934a4c2119), ROM_BIOS(5))
+	ROMX_LOAD("b6c_721_u3.u3",  0x8000, 0x8000, CRC(b1e57023) SHA1(6cec5cdc0bf4f8ac88afb0397fcb4738136b0431), ROM_BIOS(5))
 
-	ROM_SYSTEM_BIOS(6, "d2", "Maestro D (set 2)")
+	// D
+	ROM_SYSTEM_BIOS(6, "d1", "Maestro D (set 1)")
 	ROMX_LOAD("ma3_714a_u2.u2", 0x0000, 0x8000, CRC(435e1e30) SHA1(0d82df7c40443cb341dacebdf65f33c3e03bce70), ROM_BIOS(6))
-	ROMX_LOAD("b6m_629_u3.u3",  0x8000, 0x8000, CRC(15e7b1f1) SHA1(d2a757114f13c6141d74a15671aa06b675304b4a), ROM_BIOS(6))
+	ROMX_LOAD("b6m_b15_u3.u3",  0x8000, 0x8000, CRC(6155de90) SHA1(bb5cdf061dde2d1dc7925d455891c3ade1d274e3), ROM_BIOS(6))
+
+	ROM_SYSTEM_BIOS(7, "d2", "Maestro D (set 2)")
+	ROMX_LOAD("ma3_714a_u2.u2", 0x0000, 0x8000, CRC(435e1e30) SHA1(0d82df7c40443cb341dacebdf65f33c3e03bce70), ROM_BIOS(7))
+	ROMX_LOAD("b6m_629_u3.u3",  0x8000, 0x8000, CRC(15e7b1f1) SHA1(d2a757114f13c6141d74a15671aa06b675304b4a), ROM_BIOS(7))
 
 	// D+
-	ROM_SYSTEM_BIOS(7, "dp", "Maestro D+")
-	ROMX_LOAD("m6m_625_u2.u2",  0x0000, 0x8000, CRC(aa7b5cfd) SHA1(e909108fdace633a519fecf0b9876fe6a46b2067), ROM_BIOS(7))
-	ROMX_LOAD("b6m_614_u3.u3",  0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(7))
+	ROM_SYSTEM_BIOS(8, "dp", "Maestro D+")
+	ROMX_LOAD("m6m_625_u2.u2",  0x0000, 0x8000, CRC(aa7b5cfd) SHA1(e909108fdace633a519fecf0b9876fe6a46b2067), ROM_BIOS(8))
+	ROMX_LOAD("b6m_614_u3.u3",  0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(8))
 
 	// D++
-	ROM_SYSTEM_BIOS(8, "dpp", "Maestro D++")
-	ROMX_LOAD("d++_u2.u2",      0x0000, 0x8000, CRC(48ef032c) SHA1(d336cb2096780b4d3bcceda0d2ed1246e780cd8d), ROM_BIOS(8))
-	ROMX_LOAD("b6m_614_u3.u3",  0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(8))
+	ROM_SYSTEM_BIOS(9, "dpp", "Maestro D++")
+	ROMX_LOAD("d++_u2.u2",      0x0000, 0x8000, CRC(48ef032c) SHA1(d336cb2096780b4d3bcceda0d2ed1246e780cd8d), ROM_BIOS(9))
+	ROMX_LOAD("b6m_614_u3.u3",  0x8000, 0x8000, CRC(eff75543) SHA1(d7c1b3824bc87d5ffada6f5c8c72a8b292ff3d46), ROM_BIOS(9))
 ROM_END
 
 ROM_START( analyst )

diff --git a/src/devices/cpu/es5510/es5510.cpp b/src/devices/cpu/es5510/es5510.cpp
@@ -2,10 +2,10 @@
 // copyright-holders:Christian Brunschen
 /***************************************************************************************
  *
- *   es5510.c - Ensoniq ES5510 (ESP) emulation
+ *   es5510.cpp - Ensoniq ES5510 (ESP) emulation
  *   by Christian Brunschen
  *
- *   TODO
+ *   TODO:
  *      gunlock and clones: Glitch sound after game over once (MT #07861)
  *      DRAM Size isn't verified, differs per machines?
  *

diff --git a/src/devices/cpu/f2mc16/f2mc16.cpp b/src/devices/cpu/f2mc16/f2mc16.cpp
@@ -1389,6 +1389,10 @@ void f2mc16_device::execute_run()
 			opcodes_eari7c(read_8((m_pcb<<16) | (m_pc+1)));
 			break;
 
+		case 0x7f:  // RWi,ea-type instructions
+			opcodes_rwiea7f(read_8((m_pcb<<16) | (m_pc+1)));
+			break;
+
 		// MOV A, Rx
 		case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
 			m_acc <<= 16;
@@ -3209,6 +3213,23 @@ void f2mc16_device::opcodes_ea72(u8 operand)
 			m_icount -= 3;
 			break;
 
+		// RORC Rx
+		case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
+			m_shifted_carry = (m_ps & F_C) ? 1 : 0;
+			m_tmp8 = read_rX(operand & 7);
+			m_ps &= ~F_C;
+			if (m_tmp8 & 1)
+			{
+				m_ps |= F_C;
+			}
+			m_tmp8 >>= 1;
+			m_tmp8 |= m_shifted_carry ? 0x80 : 0;
+			write_rX(operand & 7, m_tmp8);
+			setNZ_8(m_tmp8);
+			m_pc += 2;
+			m_icount -= 3;
+			break;
+
 		// INC Rx
 		case 0x40: case 0x41: case 0x42: case 0x43: case 0x44: case 0x45: case 0x46: case 0x47:
 			m_tmp8 = doINC_8(read_rX(operand & 7));
@@ -3834,6 +3855,16 @@ void f2mc16_device::opcodes_ea74(u8 operand)
 {
 	switch (operand)
 	{
+		// ADD A, Rx
+		case 0x00: case 0x01: case 0x02: case 0x03: case 0x04: case 0x05: case 0x06: case 0x07:
+			m_tmp8 = read_rX(operand & 7);
+			m_tmp8 = doADD_8(m_acc & 0xff, m_tmp8);
+			m_acc &= 0xffff0000;
+			m_acc |= m_tmp8;
+			m_pc += 2;
+			m_icount -= 3;
+			break;
+
 		// SUB A, Rx
 		case 0x20: case 0x21: case 0x22: case 0x23: case 0x24: case 0x25: case 0x26: case 0x27:
 			m_tmp8 = read_rX(operand & 7);
@@ -3929,6 +3960,17 @@ void f2mc16_device::opcodes_ea74(u8 operand)
 			m_icount -= 4;
 			break;
 
+		// AND A, Rx
+		case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
+			m_tmp32 = read_rX(operand & 7);
+			m_tmp32 |= 0xffffff00;
+			m_acc &= m_tmp32;
+			setNZ_8(m_acc & 0xff);
+			m_ps &= ~F_V;
+			m_pc += 2;
+			m_icount -= 3;
+			break;
+
 		// OR A, Rx
 		case 0xa0: case 0xa1: case 0xa2: case 0xa3: case 0xa4: case 0xa5: case 0xa6: case 0xa7:
 			m_acc |= read_rX(operand & 7);
@@ -4501,6 +4543,14 @@ void f2mc16_device::opcodes_ea77(u8 operand)
 			m_icount -= 3;
 			break;
 
+		// NEGW RWx
+		case 0x60: case 0x61: case 0x62: case 0x63: case 0x64: case 0x65: case 0x66: case 0x67:
+			m_tmp16 = doSUB_16(0, read_rwX(operand & 7));
+			write_rwX(operand & 0x7, m_tmp16);
+			m_pc += 2;
+			m_icount -= 3;
+			break;
+
 		// ANDW RWx, A
 		case 0x80: case 0x81: case 0x82: case 0x83: case 0x84: case 0x85: case 0x86: case 0x87:
 			m_tmp16 = read_rwX(operand & 7);
@@ -4534,6 +4584,16 @@ void f2mc16_device::opcodes_ea77(u8 operand)
 			m_icount -= 3;
 			break;
 
+		// NOTW RWx
+		case 0xe0: case 0xe1: case 0xe2: case 0xe3: case 0xe4: case 0xe5: case 0xe6: case 0xe7:
+			m_tmp16 = read_rwX(operand & 7) ^ 0xffff;
+			write_rwX(operand & 0x7, m_tmp16);
+			setNZ_16(m_tmp16);
+			m_ps &= ~F_V;
+			m_pc += 2;
+			m_icount -= 3;
+			break;
+
 		default:
 			fatalerror("Unknown F2MC EA77 opcode %02x (PC=%x)\n", operand, (m_pcb<<16) | m_pc);
 			break;
@@ -4812,6 +4872,24 @@ void f2mc16_device::opcodes_eari7c(u8 operand)
 	}
 }
 
+void f2mc16_device::opcodes_rwiea7f(u8 operand)
+{
+	if (operand & 0x18)
+	{
+		fatalerror("Unknown F2MC EA7F operand %02x, PC=%02x%04x\n", operand, m_pcb, m_pc);
+	}
+	else
+	{
+		// XCHW RWx, RWy
+		m_tmp16 = read_rwX(operand & 0x7);
+		m_tmp16aux = read_rwX((operand>>5) & 0x7);
+		write_rwX((operand>>5) & 0x7, m_tmp16);
+		write_rwX(operand & 0x7, m_tmp16aux);
+		m_pc += 2;
+		m_icount -= 7;
+	}
+}
+
 void f2mc16_device::execute_set_input(int inputnum, int state)
 {
 }

diff --git a/src/devices/cpu/f2mc16/f2mc16.h b/src/devices/cpu/f2mc16/f2mc16.h
@@ -699,6 +699,7 @@ class f2mc16_device : public cpu_device
 	void opcodes_riea7a(u8 operand);
 	void opcodes_rwiea7b(u8 operand);
 	void opcodes_eari7c(u8 operand);
+	void opcodes_rwiea7f(u8 operand);
 
 	void set_irq(int vector, int level);
 	void clear_irq(int vector);

diff --git a/src/devices/cpu/f2mc16/f2mc16d.cpp b/src/devices/cpu/f2mc16/f2mc16d.cpp
@@ -416,7 +416,7 @@ offs_t f2mc16_disassembler::dasm_cstrop(std::ostream &stream, offs_t pc, u32 byt
 	}
 	else if ((op2 & 0xcc) == 0x80)
 		util::stream_format(stream, "%-8s%s", s_sceq_ops[BIT(op2, 4, 2)], s_segment_prefixes[BIT(op2, 0, 2)]);
-	else if ((op2 & 0xec) == 0xc0)
+	else if ((op2 & 0xdc) == 0xc0)
 		util::stream_format(stream, "%-8s%s", op2 >= 0xe0 ? "FILSWI" : "FILSI", s_segment_prefixes[BIT(op2, 0, 2)]);
 	else
 	{
@@ -1322,17 +1322,9 @@ offs_t f2mc16_disassembler::disassemble(std::ostream &stream, offs_t pc, const f
 		break;
 
 	case 0x30: case 0x31:
-	{
-		u8 operand = opcodes.r8(pc + bytes++);
-		if (operand == 0x01)
-			util::stream_format(stream, "%-8sA", BIT(op, 0) ? "DEC" : "INC");
-		else
-		{
-			util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUB" : "ADD");
-			format_imm_signed(stream, s32(s8(operand)));
-		}
+		util::stream_format(stream, "%-8sA, ", BIT(op, 0) ? "SUB" : "ADD");
+		format_imm_signed(stream, s32(s8(opcodes.r8(pc + bytes++))));
 		break;
-	}
 
 	case 0x32:
 		util::stream_format(stream, "%-8sA", "SUBC");