Merge remote-tracking branch 'upstream/master'

scripts/src/machine.lua

@@ -4475,6 +4475,18 @@ if (MACHINES["PC87306"]~=null) then
 	}
 end
 
+---------------------------------------------------
+--
+--@src/devices/machine/w83787f.h,MACHINES["W83787F"] = true
+---------------------------------------------------
+
+if (MACHINES["W83787F"]~=null) then
+	files {
+		MAME_DIR .. "src/devices/machine/w83787f.cpp",
+		MAME_DIR .. "src/devices/machine/w83787f.h",
+	}
+end
+
 ---------------------------------------------------
 --
 --@src/devices/machine/w83977tf.h,MACHINES["W83977TF"] = true

src/devices/bus/isa/svga_cirrus.cpp

@@ -353,7 +353,17 @@ void isa16_svga_cirrus_gd542x_device::device_start()
 
 	m_isa->install_memory(0xa0000, 0xbffff, read8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::mem_r)), write8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::mem_w)));
 	m_isa->install_device(0x03b0, 0x03df, *this, &isa16_svga_cirrus_gd542x_device::io_isa_map);
+}
 
+void isa16_svga_cirrus_gd542x_device::remap(int space_id, offs_t start, offs_t end)
+{
+	if (space_id == AS_PROGRAM)
+	{
+		m_isa->install_memory(0xa0000, 0xbffff, read8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::mem_r)), write8sm_delegate(*m_vga, FUNC(cirrus_gd5428_device::mem_w)));
+		m_isa->install_rom(this, 0xc0000, 0xc7fff, "clgd542x");
+	}
+	else if (space_id == AS_IO)
+		m_isa->install_device(0x03b0, 0x03df, *this, &isa16_svga_cirrus_gd542x_device::io_isa_map);
 }
 
 //-------------------------------------------------

src/devices/bus/isa/svga_cirrus.h

@@ -47,6 +47,7 @@ class isa16_svga_cirrus_gd542x_device :
 
 	uint8_t input_port_0_r();
 
+	virtual void remap(int space_id, offs_t start, offs_t end) override;
 protected:
 	// device-level overrides
 	virtual void device_start() override;

src/devices/cpu/h8/h8.cpp

@@ -612,13 +612,14 @@ int h8_device::trapa_setup()
 
 u8 h8_device::do_addx8(u8 v1, u8 v2)
 {
-	u16 res = v1 + v2 + (m_CCR & F_C ? 1 : 0);
+	u8 c = m_CCR & F_C ? 1 : 0;
+	u16 res = v1 + v2 + c;
 	m_CCR &= ~(F_N|F_V|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
-		if(((v1 & 0xf) + (v2 & 0xf) + (m_CCR & F_C ? 1 : 0)) & 0x10)
+	if(m_has_hc) {
+		if(((v1 & 0xf) + (v2 & 0xf) + c) & 0x10)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(u8(res))
 		m_CCR &= ~F_Z;
@@ -633,13 +634,14 @@ u8 h8_device::do_addx8(u8 v1, u8 v2)
 
 u8 h8_device::do_subx8(u8 v1, u8 v2)
 {
-	u16 res = v1 - v2 - (m_CCR & F_C ? 1 : 0);
+	u8 c = m_CCR & F_C ? 1 : 0;
+	u16 res = v1 - v2 - c;
 	m_CCR &= ~(F_N|F_V|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
-		if(((v1 & 0xf) - (v2 & 0xf) - (m_CCR & F_C ? 1 : 0)) & 0x10)
+	if(m_has_hc) {
+		if(((v1 & 0xf) - (v2 & 0xf) - c) & 0x10)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(u8(res))
 		m_CCR &= ~F_Z;
@@ -695,11 +697,11 @@ u8 h8_device::do_add8(u8 v1, u8 v2)
 {
 	u16 res = v1 + v2;
 	m_CCR &= ~(F_N|F_V|F_Z|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
+	if(m_has_hc) {
 		if(((v1 & 0xf) + (v2 & 0xf)) & 0x10)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(!u8(res))
 		m_CCR |= F_Z;
@@ -716,11 +718,11 @@ u16 h8_device::do_add16(u16 v1, u16 v2)
 {
 	u32 res = v1 + v2;
 	m_CCR &= ~(F_N|F_V|F_Z|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
+	if(m_has_hc) {
 		if(((v1 & 0xfff) + (v2 & 0xfff)) & 0x1000)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(!u16(res))
 		m_CCR |= F_Z;
@@ -737,11 +739,11 @@ u32 h8_device::do_add32(u32 v1, u32 v2)
 {
 	u64 res = u64(v1) + u64(v2);
 	m_CCR &= ~(F_N|F_V|F_Z|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
+	if(m_has_hc) {
 		if(((v1 & 0xfffffff) + (v2 & 0xfffffff)) & 0x10000000)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(!u32(res))
 		m_CCR |= F_Z;
@@ -797,11 +799,11 @@ u8 h8_device::do_sub8(u8 v1, u8 v2)
 {
 	u16 res = v1 - v2;
 	m_CCR &= ~(F_N|F_V|F_Z|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
+	if(m_has_hc) {
 		if(((v1 & 0xf) - (v2 & 0xf)) & 0x10)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(!u8(res))
 		m_CCR |= F_Z;
@@ -818,11 +820,11 @@ u16 h8_device::do_sub16(u16 v1, u16 v2)
 {
 	u32 res = v1 - v2;
 	m_CCR &= ~(F_N|F_V|F_Z|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
+	if(m_has_hc) {
 		if(((v1 & 0xfff) - (v2 & 0xfff)) & 0x1000)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(!u16(res))
 		m_CCR |= F_Z;
@@ -839,11 +841,11 @@ u32 h8_device::do_sub32(u32 v1, u32 v2)
 {
 	u64 res = u64(v1) - u64(v2);
 	m_CCR &= ~(F_N|F_V|F_Z|F_C);
-	if(m_has_hc)
-	{
-		m_CCR &= ~F_H;
+	if(m_has_hc) {
 		if(((v1 & 0xfffffff) - (v2 & 0xfffffff)) & 0x10000000)
 			m_CCR |= F_H;
+		else
+			m_CCR &= ~F_H;
 	}
 	if(!u32(res))
 		m_CCR |= F_Z;

src/devices/cpu/h8/h8.lst

@@ -2874,15 +2874,15 @@ macro jsr32 %opc %spreg
 	m_TMP2 = 0xffffff00 | m_IR[0];
 	m_TMP1 = read8(m_TMP2);
 	prefetch_start
-	bst m_IR[0] >> 4
+	bst m_IR[1] >> 4
 	write8(m_TMP2, m_TMP1);
 	prefetch_done();
 
 7f006780     ff00ff8f     0 bist     imm3     abs8
 	m_TMP2 = 0xffffff00 | m_IR[0];
 	m_TMP1 = read8(m_TMP2);
 	prefetch_start
-	bist m_IR[0] >> 4
+	bist m_IR[1] >> 4
 	write8(m_TMP2, m_TMP1);
 	prefetch_done();
 

src/devices/cpu/h8/h8325.cpp

@@ -97,8 +97,10 @@ void h8325_device::map(address_map &map)
 
 	map(0xffc4, 0xffc4).rw(FUNC(h8325_device::syscr_r), FUNC(h8325_device::syscr_w));
 	map(0xffc5, 0xffc5).r(FUNC(h8325_device::mdcr_r));
-	map(0xffc6, 0xffc6).rw(m_intc, FUNC(h8325_intc_device::iscr_r), FUNC(h8325_intc_device::iscr_w));
-	map(0xffc7, 0xffc7).rw(m_intc, FUNC(h8325_intc_device::ier_r), FUNC(h8325_intc_device::ier_w));
+	map(0xffc6, 0xffc6).lr8(NAME([this]() { return m_intc->iscr_r() | ~0x77; }));
+	map(0xffc6, 0xffc6).lw8(NAME([this](u8 data) { m_intc->iscr_w(data & 0x77); }));
+	map(0xffc7, 0xffc7).lr8(NAME([this]() { return m_intc->ier_r() | ~0x07; }));
+	map(0xffc7, 0xffc7).lw8(NAME([this](u8 data) { m_intc->ier_w(data & 0x07); }));
 
 	map(0xffc8, 0xffc8).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcr_r), FUNC(h8_timer8_channel_device::tcr_w));
 	map(0xffc9, 0xffc9).rw(m_timer8[0], FUNC(h8_timer8_channel_device::tcsr_r), FUNC(h8_timer8_channel_device::tcsr_w));

src/devices/cpu/h8/h8_sci.cpp

@@ -593,7 +593,7 @@ void h8_sci_device::tx_sync_tick()
 	if(m_tx_clock_counter == 0) {
 		tx_sync_step();
 
-		if(m_clock_mode == INTERNAL_SYNC_OUT)
+		if(m_clock_mode == INTERNAL_SYNC_OUT && m_tx_state != ST_IDLE)
 			m_cpu->do_sci_clk(m_id, 0);
 
 	} else if(m_tx_clock_counter == 1 && m_clock_mode == INTERNAL_SYNC_OUT)
@@ -605,7 +605,6 @@ void h8_sci_device::tx_sync_step()
 	LOGMASKED(LOG_STATE, "tx_sync_step bit=%d\n", m_tx_bit);
 	if(!m_tx_bit) {
 		m_tx_state = ST_IDLE;
-		m_tx_bit = 0;
 		clock_stop(CLK_TX);
 		m_cpu->do_sci_tx(m_id, 1);
 		m_ssr |= SSR_TEND;

src/devices/cpu/h8/h8_timer16.cpp

@@ -261,14 +261,14 @@ void h8_timer16_channel_device::update_counter(u64 cur_time)
 			m_tcnt = tt % m_counter_cycle;
 
 		for(int i = 0; i < m_tgr_count; i++) {
-			bool match = (tt == m_tgr[i] || m_tcnt == m_tgr[i]);
+			bool match = m_tcnt == m_tgr[i] || (tt == m_tgr[i] && tt == m_counter_cycle);
 			if(!match) {
 				// Need to do additional checks here for software that polls the flags with interrupts disabled,
 				// since recalc_event only schedules IRQ events.
 				if(prev >= m_counter_cycle)
 					match = (m_tgr[i] > prev && tt >= m_tgr[i]) || (m_tgr[i] <= m_counter_cycle && m_tcnt < m_counter_cycle && (delta - (0x10000 - prev)) >= m_tgr[i]);
 				else if(m_tgr[i] <= m_counter_cycle)
-					match = (delta >= m_counter_cycle) || (prev < m_tgr[i] && tt >= m_tgr[i]) || (m_tcnt <= prev && m_tcnt >= m_tgr[i]);
+					match = delta >= m_counter_cycle || (prev < m_tgr[i] && tt >= m_tgr[i]) || (m_tcnt <= prev && m_tcnt >= m_tgr[i]);
 
 				if(match && BIT(m_ier, i) && m_interrupt[i] != -1)
 					logerror("update_counter unexpected TGR %d IRQ\n, i");

src/devices/cpu/h8/h8_timer8.cpp

@@ -238,7 +238,7 @@ void h8_timer8_channel_device::update_counter(u64 cur_time)
 	else
 		m_tcnt = tt % m_counter_cycle;
 
-	if(tt == m_tcor[0] || m_tcnt == m_tcor[0]) {
+	if(m_tcnt == m_tcor[0] || (tt == m_tcor[0] && tt == m_counter_cycle)) {
 		if(m_chained_timer)
 			m_chained_timer->chained_timer_tcora();
 

src/devices/machine/sis85c496.cpp

@@ -43,14 +43,15 @@ void sis85c496_host_device::internal_io_map(address_map &map)
 {
 	pci_host_device::io_configuration_access_map(map);
 	map(0x0000, 0x001f).rw("dma8237_1", FUNC(am9517a_device::read), FUNC(am9517a_device::write));
-	map(0x0020, 0x003f).rw("pic8259_master", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
+	map(0x0020, 0x0021).rw("pic8259_master", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
+//	map(0x0022, 0x0023) 85C497 super I/O
 	map(0x0040, 0x005f).rw("pit8254", FUNC(pit8254_device::read), FUNC(pit8254_device::write));
 	map(0x0060, 0x0063).rw(FUNC(sis85c496_host_device::at_keybc_r), FUNC(sis85c496_host_device::at_keybc_w));
 	map(0x0064, 0x0067).rw("keybc", FUNC(at_keyboard_controller_device::status_r), FUNC(at_keyboard_controller_device::command_w));
-	map(0x0070, 0x007f).w(FUNC(sis85c496_host_device::rtc_nmi_w)).umask32(0x00ff00ff);
-	map(0x0070, 0x007f).rw("rtc", FUNC(ds12885_device::data_r), FUNC(ds12885_device::data_w)).umask32(0xff00ff00);
+	map(0x0070, 0x0070).lr8(NAME([this] () { return m_ds12885->get_address(); })).w(FUNC(sis85c496_host_device::rtc_address_nmi_w));
+	map(0x0071, 0x0071).rw("rtc", FUNC(ds12885_device::data_r), FUNC(ds12885_device::data_w));
 	map(0x0080, 0x009f).rw(FUNC(sis85c496_host_device::at_page8_r), FUNC(sis85c496_host_device::at_page8_w));
-	map(0x00a0, 0x00bf).rw("pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
+	map(0x00a0, 0x00a1).rw("pic8259_slave", FUNC(pic8259_device::read), FUNC(pic8259_device::write));
 	map(0x00c0, 0x00df).rw(FUNC(sis85c496_host_device::at_dma8237_2_r), FUNC(sis85c496_host_device::at_dma8237_2_w));
 	map(0x00e0, 0x00ef).noprw();
 }
@@ -127,6 +128,25 @@ void sis85c496_host_device::device_add_mconfig(machine_config &config)
 	ISA16(config, m_isabus, 0);
 	m_isabus->set_memspace(m_maincpu, AS_PROGRAM);
 	m_isabus->set_iospace(m_maincpu, AS_IO);
+	m_isabus->irq3_callback().set(FUNC(sis85c496_host_device::pc_irq3_w));
+	m_isabus->irq4_callback().set(FUNC(sis85c496_host_device::pc_irq4_w));
+	m_isabus->irq5_callback().set(FUNC(sis85c496_host_device::pc_irq5_w));
+	m_isabus->irq6_callback().set(FUNC(sis85c496_host_device::pc_irq6_w));
+	m_isabus->irq7_callback().set(FUNC(sis85c496_host_device::pc_irq7_w));
+	m_isabus->irq2_callback().set(FUNC(sis85c496_host_device::pc_irq9_w));
+	m_isabus->irq10_callback().set(FUNC(sis85c496_host_device::pc_irq10_w));
+	m_isabus->irq11_callback().set(FUNC(sis85c496_host_device::pc_irq11_w));
+	m_isabus->irq12_callback().set(FUNC(sis85c496_host_device::pc_irq12m_w));
+	m_isabus->irq14_callback().set(FUNC(sis85c496_host_device::pc_irq14_w));
+	m_isabus->irq15_callback().set(FUNC(sis85c496_host_device::pc_irq15_w));
+	m_isabus->drq0_callback().set(m_dma8237_1, FUNC(am9517a_device::dreq0_w));
+	m_isabus->drq1_callback().set(m_dma8237_1, FUNC(am9517a_device::dreq1_w));
+	m_isabus->drq2_callback().set(m_dma8237_1, FUNC(am9517a_device::dreq2_w));
+	m_isabus->drq3_callback().set(m_dma8237_1, FUNC(am9517a_device::dreq3_w));
+	m_isabus->drq5_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq1_w));
+	m_isabus->drq6_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq2_w));
+	m_isabus->drq7_callback().set(m_dma8237_2, FUNC(am9517a_device::dreq3_w));
+	m_isabus->iochck_callback().set(FUNC(sis85c496_host_device::iochck_w));
 
 	IDE_CONTROLLER_32(config, m_ide[0]).options(ata_devices, "hdd", nullptr, false);
 	m_ide[0]->irq_handler().set(m_pic8259_slave, FUNC(pic8259_device::ir6_w));
@@ -562,6 +582,20 @@ void sis85c496_host_device::pc_dack5_w(int state) { pc_select_dma_channel(5, sta
 void sis85c496_host_device::pc_dack6_w(int state) { pc_select_dma_channel(6, state); }
 void sis85c496_host_device::pc_dack7_w(int state) { pc_select_dma_channel(7, state); }
 
+void sis85c496_host_device::pc_irq1_w(int state)   { m_pic8259_master->ir1_w(state); }
+void sis85c496_host_device::pc_irq3_w(int state)   { m_pic8259_master->ir3_w(state); }
+void sis85c496_host_device::pc_irq4_w(int state)   { m_pic8259_master->ir4_w(state); }
+void sis85c496_host_device::pc_irq5_w(int state)   { m_pic8259_master->ir5_w(state); }
+void sis85c496_host_device::pc_irq6_w(int state)   { m_pic8259_master->ir6_w(state); }
+void sis85c496_host_device::pc_irq7_w(int state)   { m_pic8259_master->ir7_w(state); }
+void sis85c496_host_device::pc_irq8n_w(int state)  { m_pic8259_slave->ir0_w(state); }
+void sis85c496_host_device::pc_irq9_w(int state)   { m_pic8259_slave->ir1_w(state); }
+void sis85c496_host_device::pc_irq10_w(int state)  { m_pic8259_slave->ir2_w(state); }
+void sis85c496_host_device::pc_irq11_w(int state)  { m_pic8259_slave->ir3_w(state); }
+void sis85c496_host_device::pc_irq12m_w(int state) { m_pic8259_slave->ir4_w(state); }
+void sis85c496_host_device::pc_irq14_w(int state)  { m_pic8259_slave->ir6_w(state); }
+void sis85c496_host_device::pc_irq15_w(int state)  { m_pic8259_slave->ir7_w(state); }
+
 uint8_t sis85c496_host_device::at_portb_r()
 {
 	uint8_t data = m_at_speaker;
@@ -584,17 +618,24 @@ void sis85c496_host_device::at_portb_w(uint8_t data)
 	m_pit8254->write_gate2(BIT(data, 0));
 	at_speaker_set_spkrdata( BIT(data, 1));
 	m_channel_check = BIT(data, 3);
-	//m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
+	if (m_channel_check)
+		m_maincpu->set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
+}
+
+void sis85c496_host_device::iochck_w(int state)
+{
+	if (!state && !m_channel_check && m_nmi_enabled)
+		m_maincpu->set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
 }
 
 uint8_t sis85c496_host_device::at_dma8237_2_r(offs_t offset)
 {
-	return m_dma8237_2->read( offset / 2);
+	return m_dma8237_2->read(offset / 2);
 }
 
 void sis85c496_host_device::at_dma8237_2_w(offs_t offset, uint8_t data)
 {
-	m_dma8237_2->write( offset / 2, data);
+	m_dma8237_2->write(offset / 2, data);
 }
 
 uint8_t sis85c496_host_device::at_keybc_r(offs_t offset)
@@ -617,10 +658,9 @@ void sis85c496_host_device::at_keybc_w(offs_t offset, uint8_t data)
 	}
 }
 
-
-void sis85c496_host_device::rtc_nmi_w(uint8_t data)
+void sis85c496_host_device::rtc_address_nmi_w(uint8_t data)
 {
-	m_nmi_enabled = BIT(data,7);
+	m_nmi_enabled = BIT(data, 7);
 	//m_isabus->set_nmi_state((m_nmi_enabled==0) && (m_channel_check==0));
 	m_ds12885->address_w(data);
 }

src/devices/machine/sis85c496.h

@@ -46,6 +46,20 @@ class sis85c496_host_device : public pci_host_device {
 	void set_cpu_tag(const char *tag);
 	void set_ram_size(int ram_size);
 
+	void pc_irq1_w(int state);
+	void pc_irq3_w(int state);
+	void pc_irq4_w(int state);
+	void pc_irq5_w(int state);
+	void pc_irq6_w(int state);
+	void pc_irq7_w(int state);
+	void pc_irq8n_w(int state);
+	void pc_irq9_w(int state);
+	void pc_irq10_w(int state);
+	void pc_irq11_w(int state);
+	void pc_irq12m_w(int state);
+	void pc_irq14_w(int state);
+	void pc_irq15_w(int state);
+
 protected:
 	virtual void device_start() override;
 	virtual void device_reset() override;
@@ -150,9 +164,11 @@ class sis85c496_host_device : public pci_host_device {
 	void pc_dack7_w(int state);
 	uint8_t at_dma8237_2_r(offs_t offset);
 	void at_dma8237_2_w(offs_t offset, uint8_t data);
+	void iochck_w(int state);
 	uint8_t at_keybc_r(offs_t offset);
 	void at_keybc_w(offs_t offset, uint8_t data);
-	void rtc_nmi_w(uint8_t data);
+	u8 rtc_address_r();
+	void rtc_address_nmi_w(uint8_t data);
 	uint8_t pc_dma_read_byte(offs_t offset);
 	void pc_dma_write_byte(offs_t offset, uint8_t data);
 	uint8_t pc_dma_read_word(offs_t offset);