boards/cpu: Add GBA boot support to RIOT

boards/gba_cartridge/Kconfig

@@ -0,0 +1,13 @@
+# Copyright (c) 2023 HAW Hamburg
+#
+# This file is subject to the terms and conditions of the GNU Lesser
+# General Public License v2.1. See the file LICENSE in the top level
+# directory for more details.
+
+config BOARD
+    default "gba" if BOARD_GBA
+
+config BOARD_GBA
+    bool
+    default y
+    select CPU_MODEL_ARM7TDMI_GBA

boards/gba_cartridge/Makefile

@@ -0,0 +1,3 @@
+MODULE = board
+
+include $(RIOTBASE)/Makefile.base

boards/gba_cartridge/Makefile.features

@@ -0,0 +1,2 @@
+CPU = arm7tdmi_gba
+CPU_MODEL = arm7tdmi_gba

boards/gba_cartridge/Makefile.include

@@ -0,0 +1 @@
+FLASHFILE = $(BINFILE)

boards/gba_cartridge/doc.txt

@@ -0,0 +1,5 @@
+/**
+@defgroup    boards_gba_cartridge GBA
+@ingroup     boards
+@brief       Support for the GBA
+ */

boards/gba_cartridge/include/board.h

@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2023 Bennet Blischke <[email protected]>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     boards_gba_cartridge
+ * @{
+ *
+ * @file
+ * @brief
+ *
+ * @author
+ */
+
+#ifndef BOARD_H
+#define BOARD_H
+
+#include "cpu.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H */
+/** @} */

boards/gba_cartridge/include/periph_conf.h

@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2023 Bennet Blischke <[email protected]>
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser General
+ * Public License v2.1. See the file LICENSE in the top level directory for more
+ * details.
+ */
+
+/**
+ * @ingroup     boards_gba_cartridge
+ * @{
+ *
+ * @file
+ * @brief
+ *
+ * @author
+ */
+
+#ifndef PERIPH_CONF_H
+#define PERIPH_CONF_H
+
+#include "periph_cpu.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PERIPH_CONF_H */
+/** @} */

cpu/arm7_common/include/arm_cpu.h

@@ -25,6 +25,17 @@ void cpu_clock_scale(uint32_t source, uint32_t target, uint32_t *prescale);
 
 void arm_reset(void);
 
+/**
+ * @brief   Returns the current content of the link register (lr)
+ */
+static inline uintptr_t cpu_get_caller_pc(void)
+{
+    register uintptr_t lr_ptr;
+
+    __asm__ __volatile__ ("mov %0, lr" : "=r" (lr_ptr));
+    return lr_ptr;
+}
+
 /**
  * @brief Interrupt stack canary value
  *

cpu/arm7tdmi_gba/Makefile

@@ -0,0 +1,11 @@
+MODULE = cpu
+
+include $(RIOTCPU)/$(CPU)/Makefile.include
+
+DIRS = $(RIOTCPU)/arm7_common
+
+ifneq (,$(filter stdio_%,$(USEMODULE)))
+  DIRS += stdio_fb
+endif
+
+include $(RIOTBASE)/Makefile.base

cpu/arm7tdmi_gba/Makefile.default

@@ -0,0 +1 @@
+DISABLE_MODULE += periph_init_leds

cpu/arm7tdmi_gba/Makefile.dep

@@ -0,0 +1,7 @@
+USEMODULE += arm7_common
+
+ifeq (,$(filter stdio_%,$(USEMODULE)))
+  USEMODULE += stdio_fb
+endif
+
+include $(RIOTCPU)/arm7_common/Makefile.dep

cpu/arm7tdmi_gba/Makefile.features

@@ -0,0 +1,10 @@
+CPU_ARCH = armv4t
+CPU_CORE = arm7tdmi_s
+
+FEATURES_PROVIDED += arch_32bit
+FEATURES_PROVIDED += arch_arm
+FEATURES_PROVIDED += arch_arm7
+FEATURES_PROVIDED += cpp
+FEATURES_PROVIDED += libstdcpp
+FEATURES_PROVIDED += newlib
+FEATURES_PROVIDED += picolibc

cpu/arm7tdmi_gba/Makefile.include

@@ -0,0 +1,3 @@
+MCPU := arm7tdmi
+
+include $(RIOTCPU)/arm7_common/Makefile.include

cpu/arm7tdmi_gba/cartridge_header.s

@@ -0,0 +1,54 @@
+.section .gbaheader
+    b _startup
+    // Nintendo Logo data
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    .byte   0x00, 0x00, 0x00, 0x00
+
+    // ASCII Game title
+    .ascii  "\0\0\0\0\0\0\0\0\0\0\0\0"
+
+    // ASCII Game code
+    .ascii  "\0\0\0\0"
+
+    // ASCII Manufacturer id
+    .ascii  "\0\0"
+
+    // Fixed value
+    .byte   0x96
+
+    // Target device (0 = GBA)
+    .byte   0x00
+
+    // Reserved
+    .word   0x00000000
+    .word   0x00000000
+
+    // Version
+    .byte   0x00
+
+    // Checksum
+    .byte   0x51
+
+    // Reserved
+    .hword  0x0000
+
+    // Multiboot header
+    .zero 36

cpu/arm7tdmi_gba/cpu.c

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2023 HAW Hamburg. All rights reserved.
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+/**
+ * @ingroup     cpu_arm7tdmi_gba
+ * @{
+ */
+
+#include <stdint.h>
+#include "cpu.h"
+#include "kernel_init.h"
+
+/**
+ * @brief Initialize the CPU, set IRQ priorities, clocks
+ */
+void cpu_init(void)
+{
+    extern void board_init(void);
+
+    /* board specific setup of i/o pins */
+    board_init();
+
+    /* initialize stdio prior to periph_init() to allow use of DEBUG() there */
+    early_init();
+}

cpu/arm7tdmi_gba/doc.txt

@@ -0,0 +1,5 @@
+/**
+ * @defgroup        cpu_arm7tdmi_gba GBAs ARM7TDMI
+ * @ingroup         cpu
+ * @brief           Nintendos ARM7TDMI on the GBA
+ */

cpu/arm7tdmi_gba/include/cpu.h

@@ -0,0 +1,30 @@
+/*
+ * Copyright (C) 2023 HAW Hamburg. All rights reserved.
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+#ifndef CPU_H
+#define CPU_H
+
+/**
+ * @ingroup     cpu_arm7tdmi_gba
+ * @{
+ */
+#include "arm_cpu.h"
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+extern uintptr_t __stack_start;     /**< end of user stack memory space */
+
+#ifdef __cplusplus
+}
+#endif
+
+/** @} */
+#endif /* CPU_H */

cpu/arm7tdmi_gba/include/cpu_conf.h

@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2023 HAW Hamburg. All rights reserved.
+ *
+ * This file is subject to the terms and conditions of the GNU Lesser
+ * General Public License v2.1. See the file LICENSE in the top level
+ * directory for more details.
+ */
+
+#ifndef CPU_CONF_H
+#define CPU_CONF_H
+
+#ifdef __cplusplus
+extern "C"
+{
+#endif
+
+/**
+ * @ingroup     cpu_arm7tdmi_gba
+ *
+ * @{
+ */
+
+/**
+ * @file
+ * @brief       ARM7TDMI_GBA CPU configuration
+ *
+ * @author
+ */
+
+/**
+ * @brief   This arch uses the inlined irq API.
+ */
+#define IRQ_API_INLINED (1)
+
+/**
+ * @name Kernel configuration
+ * @{
+ */
+#define THREAD_EXTRA_STACKSIZE_PRINTF (512)
+
+#ifndef THREAD_STACKSIZE_DEFAULT
+#define THREAD_STACKSIZE_DEFAULT (1024)
+#endif
+
+#ifndef THREAD_STACKSIZE_IDLE
+#define THREAD_STACKSIZE_IDLE (160)
+#endif
+/** @} */
+
+/**
+ * @brief   Stack size used for the undefined instruction interrupt stack
+ */
+#define UND_STACKSIZE (64)
+
+/**
+ * @brief   Stack size used for the abort interrupt stack
+ */
+#define ABT_STACKSIZE (64)
+
+/**
+ * @brief   Stack size used for the interrupt (ISR) stack
+ */
+#ifndef ISR_STACKSIZE
+#define ISR_STACKSIZE (400)
+#endif
+
+/**
+ * @brief   Stack size used for the fast interrupt (FIQ) stack
+ */
+#define FIQ_STACKSIZE (64)
+
+/**
+ * @brief   Stack size used for the supervisor mode (SVC) stack
+ */
+#define SVC_STACKSIZE (400)
+
+/**
+ * @brief   Stack size used for the user mode/kernel init stack
+ */
+#define USR_STACKSIZE (4096)
+
+/**
+ * @brief   The CPU has 2 blocks of SRAM at different addresses.
+ *          (primary on-chip RAM and external working EWRAM)
+ */
+#define NUM_HEAPS (2)
+
+/** @} */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CPU_CONF_H */