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fix(vleff): reduce VL and donot raise BP exception if trigger fired o… CI for difftest #53: Commit 24bae53 pushed by huxuan0307
September 30, 2024 07:02 6m 7s difftest
difftest
September 30, 2024 07:02 6m 7s
fix(medeleg): In first implement of prevent reentrancy, BP bit in med… CI for difftest #52: Commit c088a2a pushed by huxuan0307
September 30, 2024 07:01 5m 50s difftest
difftest
September 30, 2024 07:01 5m 50s
fix(vleff): reduce VL and donot raise BP exception on later element. CI for difftest #51: Pull request #45 opened by NewPaulWalker
September 30, 2024 06:32 6m 24s NewPaulWalker:fix-fof
NewPaulWalker:fix-fof
September 30, 2024 06:32 6m 24s
fix(trigger): make BP bit in medeleg writable, and make hit bit in tdata1 read-only 0. CI for difftest #50: Pull request #44 synchronize by NewPaulWalker
September 30, 2024 06:28 5m 36s NewPaulWalker:fix-trigger
NewPaulWalker:fix-trigger
September 30, 2024 06:28 5m 36s
fix(trigger): make BP bit in medeleg writable, and make hit bit in tdata1 read-only 0. CI for difftest #49: Pull request #44 opened by NewPaulWalker
September 30, 2024 06:13 5m 34s NewPaulWalker:fix-trigger
NewPaulWalker:fix-trigger
September 30, 2024 06:13 5m 34s
fix(diff): Donot diff for tcontrol. CI for difftest #48: Commit 2462ba2 pushed by huxuan0307
September 30, 2024 05:45 5m 33s difftest
difftest
September 30, 2024 05:45 5m 33s
fix(tinfo): CPU_XIANGSHAN's Trigger Module support Mcontrol6. CI for difftest #47: Pull request #43 synchronize by NewPaulWalker
September 30, 2024 05:27 5m 42s fix-tinfo
fix-tinfo
September 30, 2024 05:27 5m 42s
fix(tinfo): CPU_XIANGSHAN's Trigger Module support Mcontrol6. CI for difftest #46: Pull request #43 opened by wissygh
September 30, 2024 04:25 5m 23s fix-tinfo
fix-tinfo
September 30, 2024 04:25 5m 23s
feat(diff): support Zicbom & Zicboz extension and set m/henvcfg init CI for difftest #45: Commit 53ee7af pushed by sinceforYy
September 25, 2024 09:51 5m 33s difftest
difftest
September 25, 2024 09:51 5m 33s
feat(diff): support Zicbom & Zicboz extension and set m/henvcfg init CI for difftest #44: Pull request #42 synchronize by sinceforYy
September 25, 2024 08:18 5m 16s sinceforYy:fix-init
sinceforYy:fix-init
September 25, 2024 08:18 5m 16s
feat(diff): support Zicbom & Zicboz extension and set m/henvcfg init CI for difftest #43: Pull request #42 opened by sinceforYy
September 25, 2024 07:25 5m 27s sinceforYy:fix-init
sinceforYy:fix-init
September 25, 2024 07:25 5m 27s
feat(diff): support svpbmt (#41) CI for difftest #42: Commit 60fcb37 pushed by cebarobot
September 23, 2024 07:26 5m 34s difftest
difftest
September 23, 2024 07:26 5m 34s
feat(diff): support svpbmt CI for difftest #41: Pull request #41 opened by Maxpicca-Li
September 23, 2024 07:15 5m 51s feat-svpbmt-2409
feat-svpbmt-2409
September 23, 2024 07:15 5m 51s
config(XIANGSHAN): Add Svpbmt, Zicbom & Zicboz extension and set menvcfg/henvcfg init value CI for difftest #40: Pull request #40 synchronize by sinceforYy
September 18, 2024 09:07 5m 16s sinceforYy:fix-init
sinceforYy:fix-init
September 18, 2024 09:07 5m 16s
config(XIANGSHAN): Add Svpbmt, Zicbom & Zicboz extension and set menvcfg/henvcfg init value CI for difftest #39: Pull request #40 synchronize by sinceforYy
September 18, 2024 07:16 5m 39s sinceforYy:fix-init
sinceforYy:fix-init
September 18, 2024 07:16 5m 39s
config(XIANGSHAN): Add Svpbmt, Zicbom & Zicboz extension and set menvcfg/henvcfg init value CI for difftest #38: Pull request #40 synchronize by sinceforYy
September 18, 2024 07:14 5m 42s sinceforYy:fix-init
sinceforYy:fix-init
September 18, 2024 07:14 5m 42s
config(XIANGSHAN): Add Svpbmt, Zicbom & Zicboz extension and set menvcfg/henvcfg init value CI for difftest #37: Pull request #40 opened by sinceforYy
September 18, 2024 04:13 5m 14s sinceforYy:fix-init
sinceforYy:fix-init
September 18, 2024 04:13 5m 14s
revert(csr): htinst/mtinst should follow the origin spike behaviour CI for difftest #36: Commit 2091e00 pushed by cebarobot
September 14, 2024 03:41 5m 28s difftest
difftest
September 14, 2024 03:41 5m 28s
revert(csr): htinst/mtinst should follow the origin spike behaviour CI for difftest #35: Pull request #39 opened by cebarobot
September 13, 2024 09:48 5m 12s revert-33-fix-tinst
revert-33-fix-tinst
September 13, 2024 09:48 5m 12s
fix: segment fault when access CSR sscratch when V=1 (#38) CI for difftest #34: Commit 8b54e28 pushed by cebarobot
September 11, 2024 09:53 5m 17s difftest
difftest
September 11, 2024 09:53 5m 17s
fix: segment fault when access CSR sscratch when V=1 CI for difftest #33: Pull request #38 opened by cebarobot
September 11, 2024 09:41 5m 44s fix-segv
fix-segv
September 11, 2024 09:41 5m 44s
fix(csr): duplicate add_csr for marchid and mimpid (#37) CI for difftest #32: Commit 35cd965 pushed by cebarobot
September 11, 2024 06:26 5m 41s difftest
difftest
September 11, 2024 06:26 5m 41s
fix(csr): duplicate add_csr for marchid and mimpid CI for difftest #31: Pull request #37 opened by cebarobot
September 11, 2024 06:15 5m 45s fix-marchid
fix-marchid
September 11, 2024 06:15 5m 45s
config: add config for misaligned memory access (#36) CI for difftest #30: Commit c395d52 pushed by cebarobot
September 11, 2024 05:37 5m 13s difftest
difftest
September 11, 2024 05:37 5m 13s
config: add config for misaligned memory access CI for difftest #29: Pull request #36 opened by cebarobot
September 11, 2024 05:28 5m 21s feat-misaligned
feat-misaligned
September 11, 2024 05:28 5m 21s