Adjustment to SCX's write conflict implementation

LIJI32 · Jul 7, 2024 · 1820671 · 1820671
1 parent c3e3fb9
commit 1820671
Showing 1 changed file with 7 additions and 14 deletions.
diff --git a/Core/sm83_cpu.c b/Core/sm83_cpu.c
@@ -22,10 +22,10 @@ typedef enum {
     GB_CONFLICT_SGB_LCDC,
     GB_CONFLICT_WX,
     GB_CONFLICT_LCDC_CGB,
-    GB_CONFLICT_SCX_CGB,
     GB_CONFLICT_LCDC_CGB_DOUBLE,
     GB_CONFLICT_STAT_CGB_DOUBLE,
     GB_CONFLICT_NR10_CGB_DOUBLE,
+    GB_CONFLICT_SCX_CGB_DOUBLE,
 } conflict_t;
 
 static const conflict_t cgb_conflict_map[0x80] = {
@@ -36,7 +36,7 @@ static const conflict_t cgb_conflict_map[0x80] = {
     [GB_IO_BGP] = GB_CONFLICT_PALETTE_CGB,
     [GB_IO_OBP0] = GB_CONFLICT_PALETTE_CGB,
     [GB_IO_OBP1] = GB_CONFLICT_PALETTE_CGB,
-    [GB_IO_SCX] = GB_CONFLICT_SCX_CGB,
+    [GB_IO_SCX] = GB_CONFLICT_READ_OLD,
 };
 
 static const conflict_t cgb_double_conflict_map[0x80] = {
@@ -45,7 +45,7 @@ static const conflict_t cgb_double_conflict_map[0x80] = {
     [GB_IO_LYC] = GB_CONFLICT_READ_OLD,
     [GB_IO_STAT] = GB_CONFLICT_STAT_CGB_DOUBLE,
     [GB_IO_NR10] = GB_CONFLICT_NR10_CGB_DOUBLE,
-    [GB_IO_SCX] = GB_CONFLICT_SCX_CGB,
+    [GB_IO_SCX] = GB_CONFLICT_SCX_CGB_DOUBLE,
 };
 
 /* Todo: verify on an MGB */
@@ -308,17 +308,10 @@ static void cycle_write(GB_gameboy_t *gb, uint16_t addr, uint8_t value)
             break;
         }
 
-        case GB_CONFLICT_SCX_CGB:
-            if (gb->cgb_double_speed) {
-                GB_advance_cycles(gb, gb->pending_cycles - 2);
-                GB_write_memory(gb, addr, value);
-                gb->pending_cycles = 6;
-            }
-            else {
-                GB_advance_cycles(gb, gb->pending_cycles);
-                GB_write_memory(gb, addr, value);
-                gb->pending_cycles = 4;
-            }
+        case GB_CONFLICT_SCX_CGB_DOUBLE:
+            GB_advance_cycles(gb, gb->pending_cycles - 2);
+            GB_write_memory(gb, addr, value);
+            gb->pending_cycles = 6;
             break;
 
         case GB_CONFLICT_NR10_CGB_DOUBLE: {