Update accfg benchmarks

[JosseVanDelm]

It seems that since #228 the accfg benchmarks have not properly been maintained because I have messed up the CI in that pull request. I feel like I can not implement #293 if this one is not working properly.

However, I've seen in this benchmark that some warnings are popping up, such as:

Op with effects in use-def chain upwards of setup SetupOp(%0 = accfg.setup "snax_gemmx" from %arg8 to ("a_ptr_low" = %1 : index, "a_ptr_high" = %2 : i32, "a_sstride_0" = %3 : i32, "a_bound_0" = %4 : i32, "a_bound_1" = %4 : i32, "a_bound_2" = %4 : i32, "a_bound_3" = %3 : i32, "a_bound_4" = %4 : i32, "a_bound_5" = %4 : i32, "a_tstride_0" = %2 : i32, "a_tstride_1" = %2 : i32, "a_tstride_2" = %2 : i32, "a_tstride_3" = %5 : i32, "a_tstride_4" = %2 : i32, "a_tstride_5" = %6 : i32, "a_address_remap" = %2 : i32, "b_ptr_low" = %7 : index, "b_ptr_high" = %2 : i32, "b_sstride_0" = %3 : i32, "b_bound_0" = %3 : i32, "b_bound_1" = %4 : i32, "b_bound_2" = %4 : i32, "b_tstride_0" = %5 : i32, "b_tstride_1" = %6 : i32, "b_tstride_2" = %2 : i32, "b_address_remap" = %2 : i32, "c_ptr_low" = %7 : index, "c_ptr_high" = %2 : i32, "c_sstride_0" = %2 : i32, "c_bound_0" = %2 : i32, "c_bound_1" = %2 : i32, "c_bound_2" = %2 : i32, "c_tstride_0" = %2 : i32, "c_tstride_1" = %2 : i32, "c_tstride_2" = %2 : i32, "c_address_remap" = %2 : i32, "d_ptr_low" = %8 : i32, "d_ptr_high" = %2 : i32, "d_sstride_0" = %3 : i32, "d_sstride_1" = %5 : i32, "d_bound_0" = %4 : i32, "d_bound_1" = %4 : i32, "d_bound_2" = %4 : i32, "d_tstride_0" = %2 : i32, "d_tstride_1" = %2 : i32, "d_tstride_2" = %2 : i32, "d_address_remap" = %2 : i32, "d_channel_mask" = %2 : i32, "e_ptr_low" = %9 : index, "e_ptr_high" = %2 : i32, "e_sstride_0" = %3 : i32, "e_sstride_1" = %5 : i32, "e_bound_0" = %4 : i32, "e_bound_1" = %4 : i32, "e_bound_2" = %4 : i32, "e_tstride_0" = %2 : i32, "e_tstride_1" = %10 : i32, "e_tstride_2" = %10 : i32, "e_address_remap" = %2 : i32, "a_transpose" = %4 : i32, "b_transpose" = %4 : i32, "d_broadcast" = %4 : i32, "K" = %3 : i32, "N" = %4 : i32, "M" = %4 : i32, "subtractions" = %2 : i32, "csr0" = %2 : i32, "csr1" = %2 : i32, "shift_0" = %2 : i32, "shift_1" = %2 : i32, "mult_0" = %2 : i32, "mult_1" = %2 : i32, "mult_2" = %2 : i32, "mult_3" = %2 : i32, "mult_4" = %2 : i32, "mult_5" = %2 : i32, "mult_6" = %2 : i32, "mult_7" = %2 : i32, "temporal_loop_bound" = %2 : i32, "bypassSIMD" = %4 : i32) : !accfg.state<"snax_gemmx">): LoadOp(%0 = "llvm.load"(%1) <{"ordering" = 0 : i64}> : (!llvm.ptr) -> !llvm.struct<(!llvm.ptr, !llvm.ptr)>)

CC @AntonLydike