Fix some CPU sign extension bugs

Hydr8gon · Aug 3, 2024 · 05b9028 · 05b9028
1 parent 5986b3b
commit 05b9028
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Showing 4 changed files with 8 additions and 10 deletions.
diff --git a/src/cpu.cpp b/src/cpu.cpp
@@ -757,7 +757,7 @@ void CPU::mult(uint32_t opcode)
     int64_t value = (int64_t)(int32_t)registersR[(opcode >> 16) & 0x1F] *
         (int32_t)registersR[(opcode >> 21) & 0x1F];
     hi = value >> 32;
-    lo = (uint32_t)value;
+    lo = (int32_t)value;
 }
 
 void CPU::multu(uint32_t opcode)
@@ -766,7 +766,7 @@ void CPU::multu(uint32_t opcode)
     uint64_t value = (uint64_t)(uint32_t)registersR[(opcode >> 16) & 0x1F] *
         (uint32_t)registersR[(opcode >> 21) & 0x1F];
     hi = value >> 32;
-    lo = (uint32_t)value;
+    lo = (int32_t)value;
 }
 
 void CPU::div(uint32_t opcode)

diff --git a/src/cpu_cp0.cpp b/src/cpu_cp0.cpp
@@ -90,7 +90,7 @@ void CPU_CP0::reset()
     scheduleCount();
 }
 
-uint32_t CPU_CP0::read(int index)
+int32_t CPU_CP0::read(int index)
 {
     // Read from a CPU CP0 register if one exists at the given index
     switch (index)
@@ -153,7 +153,7 @@ uint32_t CPU_CP0::read(int index)
     }
 }
 
-void CPU_CP0::write(int index, uint32_t value)
+void CPU_CP0::write(int index, int32_t value)
 {
     // Write to a CPU CP0 register if one exists at the given index
     switch (index)

diff --git a/src/cpu_cp0.h b/src/cpu_cp0.h
@@ -27,8 +27,8 @@ namespace CPU_CP0
     extern void (*cp0Instrs[])(uint32_t);
 
     void reset();
-    uint32_t read(int index);
-    void write(int index, uint32_t value);
+    int32_t read(int index);
+    void write(int index, int32_t value);
 
     void resetCycles();
     void checkInterrupts();

diff --git a/src/cpu_cp1.cpp b/src/cpu_cp1.cpp
@@ -179,8 +179,7 @@ uint64_t CPU_CP1::read(CP1Type type, int index)
         case CP1_32BIT:
             // Read a 32-bit register value, mapped based on the current mode
             // TODO: make this endian-safe
-            return fullMode ? *(uint32_t*)&registers[index] :
-                *((uint32_t*)&registers[index & ~1] + (index & 1));
+            return fullMode ? *(int32_t*)&registers[index] : *((int32_t*)&registers[index & ~1] + (index & 1));
 
         case CP1_64BIT:
             // Read a 64-bit register value
@@ -208,8 +207,7 @@ void CPU_CP1::write(CP1Type type, int index, uint64_t value)
         case CP1_32BIT:
             // Write a 32-bit value to a register, mapped based on the current mode
             // TODO: make this endian-safe
-            (fullMode ? *(uint32_t*)&registers[index] :
-                *((uint32_t*)&registers[index & ~1] + (index & 1))) = value;
+            (fullMode ? *(int32_t*)&registers[index] : *((int32_t*)&registers[index & ~1] + (index & 1))) = value;
             return;
 
         case CP1_64BIT: