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ITE: drivers/i2c: Adjust the prescale of I2C SCL low and high period
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When adjusting the prescale to increase the I2C SCL low period,
the high period must also be subtracted to maintain a consistent
frequency.

Signed-off-by: Tim Lin <[email protected]>
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GTLin08 authored and nashif committed Jan 18, 2024
1 parent ba11dc8 commit 9948c29
Showing 1 changed file with 23 additions and 5 deletions.
28 changes: 23 additions & 5 deletions drivers/i2c/i2c_ite_enhance.c
Original file line number Diff line number Diff line change
Expand Up @@ -294,8 +294,9 @@ static void i2c_enhanced_port_set_frequency(const struct device *dev,
int freq_hz)
{
const struct i2c_enhance_config *config = dev->config;
uint32_t clk_div, psr, pll_clock;
uint32_t clk_div, psr, pll_clock, psr_h, psr_l;
uint8_t *base = config->base;
uint8_t prescale_scl = config->prescale_scl_low;

pll_clock = chip_get_pll_freq();
/*
Expand All @@ -318,11 +319,28 @@ static void i2c_enhanced_port_set_frequency(const struct device *dev,
}

/* Adjust SCL low period prescale */
psr += config->prescale_scl_low;
psr_l = psr + prescale_scl;
if (psr_l > 0xFD) {
psr_l = 0xFD;
LOG_WRN("(psr + prescale_scl) can not be greater than 0xfd.");
}

/*
* Adjust SCL high period prescale
* The property setting prescale_scl must be less than psr and
* the minimum value of psr_h is 2.
*/
if (psr > (prescale_scl + 2)) {
psr_h = psr - prescale_scl;
} else {
psr_h = 2;
LOG_WRN("prescale_scl_low should be less than (psr - 2).");
}

/* Set I2C Speed */
IT8XXX2_I2C_PSR(base) = psr & 0xFF;
IT8XXX2_I2C_HSPR(base) = psr & 0xFF;
/* Set I2C Speed for SCL low period. */
IT8XXX2_I2C_PSR(base) = psr_l & 0xFF;
/* Set I2C Speed for SCL high period. */
IT8XXX2_I2C_HSPR(base) = psr_h & 0xFF;
}

}
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