Bump verif/core-v-verif from 6779193 to 34d39b9
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Bumps [verif/core-v-verif](https://github.com/openhwgroup/core-v-verif) from `6779193` to `34d39b9`. - [Release notes](https://github.com/openhwgroup/core-v-verif/releases) - [Commits](openhwgroup/core-v-verif@6779193...34d39b9) --- updated-dependencies: - dependency-name: verif/core-v-verif dependency-type: direct:production ... Signed-off-by: dependabot[bot] <[email protected]>
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changed the base branch from
add-lbc-&-lbcu
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cv32a6_contest_23_24
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Superseded by #2. |
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Bumps verif/core-v-verif from
6779193to34d39b9.Commits
34d39b9Merge pull request #2415 from ThalesSiliconSecurity/fix/spike-param-handling3a25166[Spike params] Add patch matching "Fix parameter handling: parsing, he..."deb7545[Spike params] Fix parameter handling: parsing, help, assignment order.d4e32fcMerge pull request #2413 from MarioOpenHWGroup/fix/tandem-requirements-for-vcsfc7ba9eUse IMPERAS as default ISSf0a1ec9Add VCS support for riscv-isa-sim tandemf7bda8eMerge pull request #2409 from ludovicpion/master8b07974remove artificial layer of heirarchy (bp_gen/bp_gen). It was a mistakeba443fbremove artificial layer of heirarchy (bp_gen/bp_gen). It was a mistake31bcffeChanges to reply to issue #2403, #2407 and #2408Dependabot will resolve any conflicts with this PR as long as you don't alter it yourself. You can also trigger a rebase manually by commenting
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