- 6.7V~35V, 12A
- 3-Phase low-side current sensing. OP-Amp Gain=6.74, Shunt resistor=20mΩ
- Overcurrent detection. Ith=30A @ OC_COMPth=500mV
- Input voltage sensing
- 32x32mm square PCB, 4xM2 mounting holes
- STSPIN32F0A 3-phase gate driver with embdded MCU SiP
- STM32F031C6 48MHz, 4KB SRAM, 32KB Flash
- 600mA sink/source gate drivers, integrated bootstrap diodes
- 12V LDO and 3.3V buck
- SiZ250DT Dual N-MOSFET, 60V, 38A, 3.3x3.3mm
- MA702 magnetic encoder, SPI
- 2x04 2.54mm Pin header for debug, JST SM03B-SRSS-TB 1x03 for Serial and I2C
| Description | Analog IC | STM32 | STM32 Func |
|---|---|---|---|
| High-side U | HS1 | PA8 | TIM1_CH1 |
| High-side V | HS2 | PA9 | TIM1_CH2 |
| High-side W | HS3 | PA10 | TIM1_CH3 |
| Low-side U | LS1 | PB13 | TIM1_CH1N |
| Low-side V | LS2 | PB14 | TIM1_CH2N |
| Low-side W | LS3 | PB15 | TIM1_CH3N |
| OC threshold select 1 | OC_TH_STBY1 | PF7 | Push-pull output |
| OC threshold select 2 | OC_TH_STBY2 | PF6 | Push-pull output |
| OC protection selection | OC_SEL | PA11 | Push-pull output |
| OC comparator output | OC_COMP_INT | PB12 | TIM1_BKIN |
| OC comparator output | OC_COMP_INT2 | PA12 | TIM1_ETR |
| Current sense U | OP3O | PA0 | ADC_IN0 |
| Current sense V | OP2O | PA1 | ADC_IN1 |
| Current sense W | OP1O | PB1 | ADC_IN9 |
| VM sense | -- | PA4 | ADC_IN4 |
| SPI SCLK | -- | PA5 | SPI1 |
| SPI MISO | -- | PA6 | SPI1 |
| SPI MOSI | -- | PA7 | SPI1 |
| SPI nCS MA702 | -- | PA15 | |
| USART Tx | -- | PA2 | USART1 |
| USART Rx | -- | PA3 | USART1 |
| I2C SCL | -- | PB6 | I2C1 |
| I2C SDA | -- | PB7 | I2C1 |
| SWDIO | -- | PA13 | |
| SWCLK | -- | PA14 | |
| Connected to GND | -- | BOOT0 | |
| User LED (Red) | -- | PF0 | Active HIGH |
| 12V indicator LED (Blue) | -- | -- |
- Unused GPIOs inside the package should be config to output low: PB0, PB2, PB3, PB4, PB5, PB8, PB9, PB10, PB11, PC13, PC14, PC15.
- OC_TH_STBY1 and OC_TH_STBY2 should be HIGH for 500mV OC threshold.
- For analog IC, the GPIO input config without pull-up or -down is always allowed.
If input voltage (i.e. VM)<15V then close SB1 to connect VM pin and VREG12 pin.
- Copper layer count: 4
- Board overall dimensions: 32 x 32 mm
- Min track/spacing: 0.13 mm / 0.13 mm
- Min hole diameter: 0.3 mm
- Castellated pads: No
- Edge card connectors: No
- Plated board edge: No
- 1oz copper
MA702 encoder SPI:
- Mode:
- 0 (CPOL=0, CPHA=0) or 1 (CPOL=1, CPHA=1)
- Data sampled on first edge
- 16-bit data frame
- MSB first
- nCS pin active low
- 25MHz clock
| STSPIN32x | F0 | F0A | F0B |
|---|---|---|---|
| Operating voltage | 8~45V | 6.7~45V | 6.7~45V |
| OP-Amps | 4 | 3 | 1 |
| GPIOs | 15 | 16 | 20 |
| BOOT0 pin | -- | Yes | Yes |
| 3FG decoding logic for Hall sensors | Yes | -- | -- |
| Comparator | OCP | OCP and current control | OCP and current control |
| Package | QFN 7x7mm 1EP | QFN 7x7mm 1EP | QFN 7x7mm 1EP |
Solved: STSPIN32F0 vs STSPIN32F0A vs STSPIN32F0B - STMicroelectronics Community
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