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Mismatch between VexRISCV UART server socket port and Makefile port configuration #3

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Vaseem205 opened this issue Apr 13, 2024 · 0 comments
Open

Mismatch between VexRISCV UART server socket port and Makefile port configuration #3

Vaseem205 opened this issue Apr 13, 2024 · 0 comments

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@Vaseem205
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Line 19 in 3_uart/vexriscv.resc creates a server socket on port 1235 using emulation CreateServerSocketTerminal 1235 "externalUART" false. However, in line 18 of 3_uart/Makefile, the port number is set to 1234.
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