Output ports in GPU not working correctly

[Examnes]

The ports on the GPU only support input, but do not support output.

Expected Behavior

When I write
mov port0, X
or
mov 63488, X
I expect this to reflect on the IOBus and there will be X at 0 cell

Current Behavior

For some reason this only works for input, i.e. mov X, port0 works as it should, but
mov port0, X does not work, or rather it works, and X really gets into cell 63488, but it is not accessible from the outside.

Possible Solution

I'm not sure, but in the code I have not seen any logic related to writing to IOBus, read only.

Steps to Reproduce

1.Enter the following code in the editor:

Main();
#include <drivers\drv_gl.txt>
void Main()
{
      glVertexMode( 1 );
      mov port0,220
      glClear( 70, 70, port0, 255 );
      glBindTexture( 'brick/brick_model' );
      glColor( 255, 255, 255, 255 );
      glRectWH( 128, 128, 256, 256 );
      glExit();
}

2.Install GPU somewhere
3.Install near Data port
4.Install a screen next to it
5.Connect screen to port0 of Data Port
6.Connect IOBus to Data Port
7.Refresh GPU

0 should still remain on screen

Context

I would like to send requests from the GPU to receive any data from the outside, because the internal memory of the GPU is limited, and for this IOBus and MemBus are provided there, but for some reason, they both work only for input.

[thegrb93]

I think this is intended since Gpu is clientside, but I'm not 100% familiar with it.

[ghost]

The GPU has code for sending external I/O writes to the server, but only for the membus (though there is no reason this couldn't be extended to support the IObus).

[ghost]

While the documentation doesn't say much about port I/O, the way the MemBus is described kinda implies that it's the only way to send data back to the server.

Chapter 7, section 1.3 (page 246) - Features

The memory area between addresses 65536 and 131071 (inclusive) is reserved as an
additional external memory bus. It is very slow, but it allows GPU to communicate with
other devices.

Chapter 7, section 3 (page 254) - Internal Registers

Memory offsets 63488..64511 are mapped to the IOBus (external ports). The memory
offsets 65536..131071 are mapped to the MemBus, allowing for access to external devices
from the GPU. There is support for both reading and writing this memory, although at
very low speed.

[thegrb93]

So the 63488 should work port output I presume?

[Examnes]

Reading into membus not worked for me too
https://youtu.be/iRJKyNGDvKw

[ghost]

Writing to the port registers only overwrites the cached copy of the value previously read from the server. The documentation suggests that this might be intentional.

[ghost]

@Examnes

Reading into membus not worked for me too
https://youtu.be/iRJKyNGDvKw

The 64k memory model does not support MemBus I/O (on your version). Use 128k instead.