From 1c4cdfe4b75a75cfd841c48a6bf63f52bf59855e Mon Sep 17 00:00:00 2001 From: Marius Vikhammer Date: Thu, 9 May 2024 17:45:01 +0800 Subject: [PATCH 01/17] fix(brownout): fixed brownout isr crashing if cache disabled If a brownout ISR was triggered while cache was disabled the system would panic. This was due to a print accessing a string stored in flash --- components/esp_system/port/brownout.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_system/port/brownout.c b/components/esp_system/port/brownout.c index 568e1044ddec..98724fb6c994 100644 --- a/components/esp_system/port/brownout.c +++ b/components/esp_system/port/brownout.c @@ -28,7 +28,7 @@ #define BROWNOUT_DET_LVL 0 #endif -static __attribute__((unused)) DRAM_ATTR const char *TAG = "BOD"; +static __attribute__((unused)) DRAM_ATTR const char TAG[] = "BOD"; #if CONFIG_ESP_SYSTEM_BROWNOUT_INTR IRAM_ATTR static void rtc_brownout_isr_handler(void *arg) From 7158afb1630582234cb012b9ad15ef41949b276f Mon Sep 17 00:00:00 2001 From: WanqQixiang Date: Fri, 28 Jun 2024 15:59:30 +0800 Subject: [PATCH 02/17] fix(openthread): register uart vfs devices when they are not registered --- .../openthread/src/port/esp_openthread_uart.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/components/openthread/src/port/esp_openthread_uart.c b/components/openthread/src/port/esp_openthread_uart.c index 9c8ef64cde6d..ba532af6962b 100644 --- a/components/openthread/src/port/esp_openthread_uart.c +++ b/components/openthread/src/port/esp_openthread_uart.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2021-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2021-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -61,6 +61,16 @@ otError otPlatUartSend(const uint8_t *buf, uint16_t buf_length) esp_err_t esp_openthread_uart_init_port(const esp_openthread_uart_config_t *config) { +#ifndef CONFIG_ESP_CONSOLE_UART + // If UART console is used, UART vfs devices should be registered during startup. + // Otherwise we need to register them here. + DIR *uart_dir = opendir("/dev/uart"); + if (!uart_dir) { + esp_vfs_dev_uart_register(); + } else { + closedir(uart_dir); + } +#endif ESP_RETURN_ON_ERROR(uart_param_config(config->port, &config->uart_config), OT_PLAT_LOG_TAG, "uart_param_config failed"); ESP_RETURN_ON_ERROR( @@ -90,7 +100,6 @@ esp_err_t esp_openthread_host_cli_usb_init(const esp_openthread_platform_config_ ret = usb_serial_jtag_driver_install((usb_serial_jtag_driver_config_t *)&config->host_config.host_usb_config); esp_vfs_usb_serial_jtag_use_driver(); - esp_vfs_dev_uart_register(); return ret; } #endif From faae7eccac54055cfd3e43114144077f285e8938 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Adam=20M=C3=BAdry?= Date: Mon, 29 Jan 2024 10:19:22 +0100 Subject: [PATCH 03/17] fix: PRI inttypes error due to C++ invalid suffix on literal in SPIFFS --- components/spiffs/include/spiffs_config.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/spiffs/include/spiffs_config.h b/components/spiffs/include/spiffs_config.h index b245a5d1b54e..3281619256ba 100644 --- a/components/spiffs/include/spiffs_config.h +++ b/components/spiffs/include/spiffs_config.h @@ -71,7 +71,7 @@ extern void spiffs_api_unlock(struct spiffs_t *fs); // Defines spiffs debug print formatters // some general signed number -#define _SPIPRIi "%"PRIdMAX +#define _SPIPRIi "%" PRIdMAX // address #define _SPIPRIad "%08x" // block From bf7ab2249cc286049e158f7fa4b9cd2b9b01d2ac Mon Sep 17 00:00:00 2001 From: Myk Melez Date: Wed, 26 Jun 2024 15:34:23 -0700 Subject: [PATCH 04/17] fix(pthread): Remove TLS pointer/deletion callback from correct thread Originally, pthread_internal_local_storage_destructor_callback was only called from pthread_exit on the thread whose TLS is being destroyed. In b3755b751ed42d98c933a919c744dc6455f5ee68, pthread_internal_local_storage_destructor_callback started being called from pthread_join and pthread_detach on a different thread (whichever one called one of those functions). But pthread_internal_local_storage_destructor_callback is still calling vTaskSetThreadLocalStoragePointer and vTaskSetThreadLocalStoragePointerAndDelCallback with a NULL xTaskToSet argument, which causes those functions to set the TLS pointer and deletion callback for the current thread, not the thread whose TLS is being destroyed. This commit makes pthread_internal_local_storage_destructor_callback call vTaskSetThreadLocalStoragePointer and vTaskSetThreadLocalStoragePointerAndDelCallback with the handle of the thread whose TLS is being destroyed. --- components/pthread/pthread_local_storage.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/components/pthread/pthread_local_storage.c b/components/pthread/pthread_local_storage.c index abb547675bda..8d015813ee98 100644 --- a/components/pthread/pthread_local_storage.c +++ b/components/pthread/pthread_local_storage.c @@ -147,7 +147,9 @@ static void pthread_cleanup_thread_specific_data_callback(int index, void *v_tls free(tls); } -/* this function called from pthread_task_func for "early" cleanup of TLS in a pthread */ +/* this function called from pthread_task_func for "early" cleanup of TLS in a pthread + and from pthread_join/pthread_detach for cleanup of TLS after pthread exit +*/ void pthread_internal_local_storage_destructor_callback(TaskHandle_t handle) { void *tls = pvTaskGetThreadLocalStoragePointer(handle, PTHREAD_TLS_INDEX); @@ -157,9 +159,9 @@ void pthread_internal_local_storage_destructor_callback(TaskHandle_t handle) calling it again... */ #if !defined(CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS) - vTaskSetThreadLocalStoragePointer(NULL, PTHREAD_TLS_INDEX, NULL); + vTaskSetThreadLocalStoragePointer(handle, PTHREAD_TLS_INDEX, NULL); #else - vTaskSetThreadLocalStoragePointerAndDelCallback(NULL, + vTaskSetThreadLocalStoragePointerAndDelCallback(handle, PTHREAD_TLS_INDEX, NULL, NULL); From f3b58d221d915f2eae0d4455b9f5458221b7598c Mon Sep 17 00:00:00 2001 From: zwl Date: Wed, 26 Jun 2024 12:23:42 +0800 Subject: [PATCH 05/17] fix(ble): fixed some ble controller issues on ESP32-C2 --- components/bt/controller/lib_esp32c2/esp32c2-bt-lib | 2 +- components/esp_rom/esp32c2/ld/esp32c2.rom.ld | 1 - 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/components/bt/controller/lib_esp32c2/esp32c2-bt-lib b/components/bt/controller/lib_esp32c2/esp32c2-bt-lib index 8ddd8acac498..e597ae529761 160000 --- a/components/bt/controller/lib_esp32c2/esp32c2-bt-lib +++ b/components/bt/controller/lib_esp32c2/esp32c2-bt-lib @@ -1 +1 @@ -Subproject commit 8ddd8acac498fcbb76b5a39c5c7d4025238298ab +Subproject commit e597ae529761d270f10d0616c375faa0e4b7ca13 diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld index a3ac43639a71..2b58e7ac87f4 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld @@ -1048,7 +1048,6 @@ r_ble_lll_adv_coex_dpc_update_on_event_scheduled = 0x40001418; r_ble_lll_adv_done = 0x4000141c; r_ble_lll_adv_event_done = 0x40001424; r_ble_lll_adv_event_rmvd_from_sched = 0x40001428; -r_ble_lll_adv_ext_estimate_data_itvl = 0x4000142c; r_ble_lll_adv_get_sec_pdu_len = 0x40001430; r_ble_lll_adv_make_done = 0x40001438; r_ble_lll_adv_periodic_done = 0x4000143c; From b7534381117eba13db53c346b4dbe35af946622e Mon Sep 17 00:00:00 2001 From: zwl Date: Tue, 2 Jul 2024 15:09:51 +0800 Subject: [PATCH 06/17] fix(ble): fixed some ble controller issues on ESP32C6 and ESP32H2 --- components/bt/controller/lib_esp32c6/esp32c6-bt-lib | 2 +- components/bt/controller/lib_esp32h2/esp32h2-bt-lib | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/components/bt/controller/lib_esp32c6/esp32c6-bt-lib b/components/bt/controller/lib_esp32c6/esp32c6-bt-lib index ed6c0b4e0ab3..4a63b2963a8a 160000 --- a/components/bt/controller/lib_esp32c6/esp32c6-bt-lib +++ b/components/bt/controller/lib_esp32c6/esp32c6-bt-lib @@ -1 +1 @@ -Subproject commit ed6c0b4e0ab3b8ddce5d8bc65e417b1adcbca5b4 +Subproject commit 4a63b2963a8a75958db680df4ace64bbd3d6c618 diff --git a/components/bt/controller/lib_esp32h2/esp32h2-bt-lib b/components/bt/controller/lib_esp32h2/esp32h2-bt-lib index 2d69367e13a9..96b48749e249 160000 --- a/components/bt/controller/lib_esp32h2/esp32h2-bt-lib +++ b/components/bt/controller/lib_esp32h2/esp32h2-bt-lib @@ -1 +1 @@ -Subproject commit 2d69367e13a928afb73d1a8c579c0dad98eb9393 +Subproject commit 96b48749e249d0752f196007b008212cb8b28e07 From 9c7a81083c69b8afb9deb9b5fa3f1034bfa4c630 Mon Sep 17 00:00:00 2001 From: luoxu Date: Tue, 28 May 2024 17:52:36 +0800 Subject: [PATCH 07/17] feat(ble_mesh): add cas operation for bt_mesh_atomic_val_t --- components/bt/esp_ble_mesh/common/atomic.c | 19 ++++++++++++- .../esp_ble_mesh/common/include/mesh/atomic.h | 27 +++++++++++++++++++ 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/components/bt/esp_ble_mesh/common/atomic.c b/components/bt/esp_ble_mesh/common/atomic.c index 723ce7e3ac15..40f163ab4511 100644 --- a/components/bt/esp_ble_mesh/common/atomic.c +++ b/components/bt/esp_ble_mesh/common/atomic.c @@ -13,7 +13,7 @@ /* * SPDX-FileCopyrightText: 2016 Intel Corporation * SPDX-FileCopyrightText: 2011-2014 Wind River Systems, Inc. - * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -170,4 +170,21 @@ bt_mesh_atomic_val_t bt_mesh_atomic_inc(bt_mesh_atomic_t *target) return ret; } +bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val) +{ + bt_mesh_atomic_val_t ret = 0; + + bt_mesh_atomic_lock(); + + ret = *target; + if (*target == excepted) { + *target = new_val; + bt_mesh_atomic_unlock(); + return true; + } + + bt_mesh_atomic_unlock(); + return false; +} + #endif /* #ifndef CONFIG_ATOMIC_OPERATIONS_BUILTIN */ diff --git a/components/bt/esp_ble_mesh/common/include/mesh/atomic.h b/components/bt/esp_ble_mesh/common/include/mesh/atomic.h index f72834369fc5..c6ef0fc5ae00 100644 --- a/components/bt/esp_ble_mesh/common/include/mesh/atomic.h +++ b/components/bt/esp_ble_mesh/common/include/mesh/atomic.h @@ -147,6 +147,33 @@ static inline bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, extern bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t value); #endif +/** + * @brief Atomic CAS operation. + * + * This compares the contents of @a *target + * with the contents of @a excepted. If equal, + * the operation is a read-modify-write operation + * that writes @a new_val into @a *target and return true. + * If they are not equal, the operation is a read + * and return false. + * + * @param target Address of atomic variable. + * @param excepted Value of excepted. + * @param new_val Write value if compare sunncess. + * + * @return + * - true: write operation succeeded. + * - false: write operation failed. + */ +#ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN +static inline bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val) +{ + return __atomic_compare_exchange_n(target, &excepted, &new_val, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); +} +#else +extern bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val); +#endif + /** * @cond INTERNAL_HIDDEN */ From f5ae03e8f4374808f9aa36912e17289c85b0f346 Mon Sep 17 00:00:00 2001 From: luoxu Date: Tue, 28 May 2024 18:02:46 +0800 Subject: [PATCH 08/17] fix(ble_mesh): ensure the operation of adv busy is thread-safe --- components/bt/esp_ble_mesh/common/atomic.c | 5 +---- .../esp_ble_mesh/common/include/mesh/atomic.h | 10 +++++----- components/bt/esp_ble_mesh/core/adv.c | 18 +++++++++--------- components/bt/esp_ble_mesh/core/adv.h | 8 ++++++-- components/bt/esp_ble_mesh/core/friend.c | 2 +- components/bt/esp_ble_mesh/core/prov_common.c | 4 ++-- components/bt/esp_ble_mesh/core/transport.c | 14 +++++++++++--- .../bt/esp_ble_mesh/core/transport.enh.c | 6 +++--- 8 files changed, 38 insertions(+), 29 deletions(-) diff --git a/components/bt/esp_ble_mesh/common/atomic.c b/components/bt/esp_ble_mesh/common/atomic.c index 40f163ab4511..9c856cc33723 100644 --- a/components/bt/esp_ble_mesh/common/atomic.c +++ b/components/bt/esp_ble_mesh/common/atomic.c @@ -170,13 +170,10 @@ bt_mesh_atomic_val_t bt_mesh_atomic_inc(bt_mesh_atomic_t *target) return ret; } -bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val) +bool bt_mesh_atomic_cas(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val) { - bt_mesh_atomic_val_t ret = 0; - bt_mesh_atomic_lock(); - ret = *target; if (*target == excepted) { *target = new_val; bt_mesh_atomic_unlock(); diff --git a/components/bt/esp_ble_mesh/common/include/mesh/atomic.h b/components/bt/esp_ble_mesh/common/include/mesh/atomic.h index c6ef0fc5ae00..b284974363a3 100644 --- a/components/bt/esp_ble_mesh/common/include/mesh/atomic.h +++ b/components/bt/esp_ble_mesh/common/include/mesh/atomic.h @@ -159,19 +159,19 @@ extern bt_mesh_atomic_val_t bt_mesh_atomic_and(bt_mesh_atomic_t *target, bt_mesh * * @param target Address of atomic variable. * @param excepted Value of excepted. - * @param new_val Write value if compare sunncess. + * @param new_val Write if target value is equal to expected one. * * @return - * - true: write operation succeeded. - * - false: write operation failed. + * - true: Target value updated. + * - false: Target value not updated. */ #ifdef CONFIG_ATOMIC_OPERATIONS_BUILTIN -static inline bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val) +static inline bool bt_mesh_atomic_cas(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val) { return __atomic_compare_exchange_n(target, &excepted, &new_val, false, __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); } #else -extern bool bt_mesh_atomic_campare_and_set(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val); +extern bool bt_mesh_atomic_cas(bt_mesh_atomic_t *target, bt_mesh_atomic_val_t excepted, bt_mesh_atomic_val_t new_val); #endif /** diff --git a/components/bt/esp_ble_mesh/core/adv.c b/components/bt/esp_ble_mesh/core/adv.c index dbbda0ab147f..79932a058299 100644 --- a/components/bt/esp_ble_mesh/core/adv.c +++ b/components/bt/esp_ble_mesh/core/adv.c @@ -2,7 +2,7 @@ /* * SPDX-FileCopyrightText: 2017 Intel Corporation - * SPDX-FileContributor: 2018-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -335,8 +335,7 @@ static void adv_thread(void *p) } /* busy == 0 means this was canceled */ - if (BLE_MESH_ADV(*buf)->busy) { - BLE_MESH_ADV(*buf)->busy = 0U; + if (bt_mesh_atomic_cas(&BLE_MESH_ADV_BUSY(*buf), 1, 0)) { #if !CONFIG_BLE_MESH_RELAY_ADV_BUF if (adv_send(*buf)) { BT_WARN("Failed to send adv packet"); @@ -449,7 +448,7 @@ static void bt_mesh_unref_buf(bt_mesh_msg_t *msg) if (msg->arg) { buf = (struct net_buf *)msg->arg; - BLE_MESH_ADV(buf)->busy = 0U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 0); if (buf->ref > 1U) { buf->ref = 1U; } @@ -490,7 +489,7 @@ void bt_mesh_adv_send(struct net_buf *buf, uint8_t xmit, BLE_MESH_ADV(buf)->cb = cb; BLE_MESH_ADV(buf)->cb_data = cb_data; - BLE_MESH_ADV(buf)->busy = 1U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 1); BLE_MESH_ADV(buf)->xmit = xmit; bt_mesh_adv_buf_ref_debug(__func__, buf, 3U, BLE_MESH_BUF_REF_SMALL); @@ -589,7 +588,7 @@ void bt_mesh_relay_adv_send(struct net_buf *buf, uint8_t xmit, BLE_MESH_ADV(buf)->cb = cb; BLE_MESH_ADV(buf)->cb_data = cb_data; - BLE_MESH_ADV(buf)->busy = 1U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 1); BLE_MESH_ADV(buf)->xmit = xmit; msg.arg = (void *)net_buf_ref(buf); @@ -753,7 +752,7 @@ static void bt_mesh_ble_adv_send(struct net_buf *buf, const struct bt_mesh_send_ BLE_MESH_ADV(buf)->cb = cb; BLE_MESH_ADV(buf)->cb_data = cb_data; - BLE_MESH_ADV(buf)->busy = 1U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 1); bt_mesh_adv_buf_ref_debug(__func__, buf, 3U, BLE_MESH_BUF_REF_SMALL); @@ -772,7 +771,7 @@ static void ble_adv_tx_reset(struct ble_adv_tx *tx, bool unref) } bt_mesh_atomic_set(tx->flags, 0); memset(&tx->param, 0, sizeof(tx->param)); - BLE_MESH_ADV(tx->buf)->busy = 0U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(tx->buf), 0); if (unref) { net_buf_unref(tx->buf); } @@ -961,7 +960,8 @@ int bt_mesh_stop_ble_advertising(uint8_t index) /* busy 1, ref 1; busy 1, ref 2; * busy 0, ref 0; busy 0, ref 1; */ - if (BLE_MESH_ADV(tx->buf)->busy == 1U && + + if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(tx->buf)) && tx->buf->ref == 1U) { unref = false; } diff --git a/components/bt/esp_ble_mesh/core/adv.h b/components/bt/esp_ble_mesh/core/adv.h index ab37ec3cda85..33224d78b111 100644 --- a/components/bt/esp_ble_mesh/core/adv.h +++ b/components/bt/esp_ble_mesh/core/adv.h @@ -10,6 +10,7 @@ #ifndef _ADV_H_ #define _ADV_H_ +#include "mesh/atomic.h" #include "mesh/access.h" #include "mesh/adapter.h" @@ -24,6 +25,7 @@ extern "C" { #define BLE_MESH_ADV_USER_DATA_SIZE 4 #define BLE_MESH_ADV(buf) (*(struct bt_mesh_adv **)net_buf_user_data(buf)) +#define BLE_MESH_ADV_BUSY(buf) (BLE_MESH_ADV(buf)->busy) uint16_t bt_mesh_pdu_duration(uint8_t xmit); @@ -48,8 +50,10 @@ struct bt_mesh_adv { const struct bt_mesh_send_cb *cb; void *cb_data; - uint8_t type:3, - busy:1; + uint8_t type:3; + + bt_mesh_atomic_t busy; + uint8_t xmit; }; diff --git a/components/bt/esp_ble_mesh/core/friend.c b/components/bt/esp_ble_mesh/core/friend.c index fca3cf1358a4..b1a298d5a97a 100644 --- a/components/bt/esp_ble_mesh/core/friend.c +++ b/components/bt/esp_ble_mesh/core/friend.c @@ -183,7 +183,7 @@ static void friend_clear(struct bt_mesh_friend *frnd, uint8_t reason) /* Cancel the sending if necessary */ if (frnd->pending_buf) { bt_mesh_adv_buf_ref_debug(__func__, frnd->last, 2U, BLE_MESH_BUF_REF_EQUAL); - BLE_MESH_ADV(frnd->last)->busy = 0U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(frnd->last), 0); } else { bt_mesh_adv_buf_ref_debug(__func__, frnd->last, 1U, BLE_MESH_BUF_REF_EQUAL); } diff --git a/components/bt/esp_ble_mesh/core/prov_common.c b/components/bt/esp_ble_mesh/core/prov_common.c index 655c4712f244..bc75b447d256 100644 --- a/components/bt/esp_ble_mesh/core/prov_common.c +++ b/components/bt/esp_ble_mesh/core/prov_common.c @@ -359,7 +359,7 @@ static void free_segments(struct bt_mesh_prov_link *link) link->tx.buf[i] = NULL; bt_mesh_adv_buf_ref_debug(__func__, buf, 3U, BLE_MESH_BUF_REF_SMALL); /* Mark as canceled */ - BLE_MESH_ADV(buf)->busy = 0U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(buf), 0); net_buf_unref(buf); } } @@ -474,7 +474,7 @@ static void prov_retransmit(struct k_work *work) break; } - if (BLE_MESH_ADV(buf)->busy) { + if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(buf))) { continue; } diff --git a/components/bt/esp_ble_mesh/core/transport.c b/components/bt/esp_ble_mesh/core/transport.c index 64ac566aced5..70589706dae3 100644 --- a/components/bt/esp_ble_mesh/core/transport.c +++ b/components/bt/esp_ble_mesh/core/transport.c @@ -2,7 +2,7 @@ /* * SPDX-FileCopyrightText: 2017 Intel Corporation - * SPDX-FileContributor: 2018-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileContributor: 2018-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -310,7 +310,15 @@ static void seg_tx_done(struct seg_tx *tx, uint8_t seg_idx) { bt_mesh_adv_buf_ref_debug(__func__, tx->seg[seg_idx], 3U, BLE_MESH_BUF_REF_SMALL); - BLE_MESH_ADV(tx->seg[seg_idx])->busy = 0U; + /** + * When cancelling a segment that is still in the adv sending queue, `tx->seg_pending` + * must else be decremented by one. More detailed information + * can be found in BLEMESH24-26. + */ + if (bt_mesh_atomic_cas(&BLE_MESH_ADV_BUSY(tx->seg[seg_idx]), 1, 0)) { + tx->seg_pending--; + } + net_buf_unref(tx->seg[seg_idx]); tx->seg[seg_idx] = NULL; tx->nack_count--; @@ -443,7 +451,7 @@ static void seg_tx_send_unacked(struct seg_tx *tx) continue; } - if (BLE_MESH_ADV(seg)->busy) { + if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(seg))) { BT_DBG("Skipping segment that's still advertising"); continue; } diff --git a/components/bt/esp_ble_mesh/core/transport.enh.c b/components/bt/esp_ble_mesh/core/transport.enh.c index 6ef6c0a55db3..a4a5130e2150 100644 --- a/components/bt/esp_ble_mesh/core/transport.enh.c +++ b/components/bt/esp_ble_mesh/core/transport.enh.c @@ -350,7 +350,7 @@ static void seg_tx_done(struct seg_tx *tx, uint8_t seg_idx) */ bt_mesh_adv_buf_ref_debug(__func__, tx->seg[seg_idx], 4U, BLE_MESH_BUF_REF_SMALL); - BLE_MESH_ADV(tx->seg[seg_idx])->busy = 0U; + bt_mesh_atomic_set(&BLE_MESH_ADV_BUSY(tx->seg[seg_idx]), 0); net_buf_unref(tx->seg[seg_idx]); tx->seg[seg_idx] = NULL; @@ -498,7 +498,7 @@ static bool send_next_segment(struct seg_tx *tx, int *result) /* The segment may have already been transmitted, for example, the * Segment Retransmission timer is expired earlier. */ - if (BLE_MESH_ADV(seg)->busy) { + if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(seg))) { return false; } @@ -768,7 +768,7 @@ static bool resend_unacked_seg(struct seg_tx *tx, int *result) * A is still going to be retransmitted, but at this moment we could * find that the "busy" flag of Segment A is 1. */ - if (BLE_MESH_ADV(seg)->busy) { + if (bt_mesh_atomic_get(&BLE_MESH_ADV_BUSY(seg))) { return false; } From 34abdaea46ef44c585d1c66772cd336eac618df1 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Thu, 11 Apr 2024 15:52:54 +0800 Subject: [PATCH 09/17] fix(i2c_master): Modify the behavior from ISR WDT to return timeout when circut get shortcut, Closes https://github.com/espressif/esp-idf/issues/13587 --- components/driver/i2c/i2c_master.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/components/driver/i2c/i2c_master.c b/components/driver/i2c/i2c_master.c index 13954c805d01..89036d172a7a 100644 --- a/components/driver/i2c/i2c_master.c +++ b/components/driver/i2c/i2c_master.c @@ -424,7 +424,7 @@ static void s_i2c_send_commands(i2c_master_bus_handle_t i2c_master, TickType_t t }; i2c_ll_master_write_cmd_reg(hal->dev, hw_stop_cmd, 0); i2c_hal_master_trans_start(hal); - return; + break; } i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->trans_idx]; @@ -563,7 +563,6 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf IRAM_ATTR static void i2c_isr_receive_handler(i2c_master_bus_t *i2c_master) { i2c_hal_context_t *hal = &i2c_master->base->hal; - while(i2c_ll_is_bus_busy(hal->dev)){} if (i2c_master->status == I2C_STATUS_READ) { i2c_operation_t *i2c_operation = &i2c_master->i2c_trans.ops[i2c_master->trans_idx]; portENTER_CRITICAL_ISR(&i2c_master->base->spinlock); @@ -624,7 +623,9 @@ static void IRAM_ATTR i2c_master_isr_handler_default(void *arg) xQueueSendFromISR(i2c_master->event_queue, (void *)&i2c_master->event, &HPTaskAwoken); } if (i2c_master->contains_read == true) { - i2c_isr_receive_handler(i2c_master); + if (int_mask & I2C_LL_INTR_MST_COMPLETE || int_mask & I2C_LL_INTR_END_DETECT) { + i2c_isr_receive_handler(i2c_master); + } } if (i2c_master->async_trans) { From 5847ba0b9af96b0598aaa41406fc37e049ca0f28 Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Fri, 12 Apr 2024 11:46:36 +0800 Subject: [PATCH 10/17] fix(i2c_master): Fix the issue that probe cannot work properly after a general call, Closes https://github.com/espressif/esp-idf/issues/13547 --- components/driver/i2c/i2c_master.c | 19 ++++++++++ components/driver/i2c/i2c_private.h | 3 +- .../i2c_test_apps/main/test_i2c_common.c | 35 +++++++++++++++++++ 3 files changed, 56 insertions(+), 1 deletion(-) diff --git a/components/driver/i2c/i2c_master.c b/components/driver/i2c/i2c_master.c index 89036d172a7a..21060fa0fbb1 100644 --- a/components/driver/i2c/i2c_master.c +++ b/components/driver/i2c/i2c_master.c @@ -107,6 +107,18 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master) return ESP_OK; } +static void s_i2c_err_log_print(i2c_master_event_t event, bool bypass_nack_log) +{ + if (event == I2C_EVENT_TIMEOUT) { + ESP_LOGE(TAG, "I2C transaction timeout detected"); + } + if (bypass_nack_log != true) { + if (event == I2C_EVENT_NACK) { + ESP_LOGE(TAG, "I2C transaction unexpected nack detected"); + } + } +} + //////////////////////////////////////I2C operation functions//////////////////////////////////////////// /** * @brief This function is used to send I2C write command, which is divided in two parts. @@ -405,6 +417,7 @@ static void s_i2c_send_commands(i2c_master_bus_handle_t i2c_master, TickType_t t // Software timeout, clear the command link and finish this transaction. i2c_master->cmd_idx = 0; i2c_master->trans_idx = 0; + atomic_store(&i2c_master->status, I2C_STATUS_TIMEOUT); return; } @@ -424,6 +437,8 @@ static void s_i2c_send_commands(i2c_master_bus_handle_t i2c_master, TickType_t t }; i2c_ll_master_write_cmd_reg(hal->dev, hw_stop_cmd, 0); i2c_hal_master_trans_start(hal); + // The master trans start would start a transaction. + // Queue wait for the event instead of return directly. break; } @@ -446,6 +461,7 @@ static void s_i2c_send_commands(i2c_master_bus_handle_t i2c_master, TickType_t t if (event == I2C_EVENT_DONE) { atomic_store(&i2c_master->status, I2C_STATUS_DONE); } + s_i2c_err_log_print(event, i2c_master->bypass_nack_log); } else { i2c_master->cmd_idx = 0; i2c_master->trans_idx = 0; @@ -1093,6 +1109,8 @@ esp_err_t i2c_master_probe(i2c_master_bus_handle_t bus_handle, uint16_t address, bus_handle->cmd_idx = 0; bus_handle->trans_idx = 0; bus_handle->trans_done = false; + bus_handle->status = I2C_STATUS_IDLE; + bus_handle->bypass_nack_log = true; i2c_hal_context_t *hal = &bus_handle->base->hal; i2c_operation_t i2c_ops[] = { {.hw_cmd = I2C_TRANS_START_COMMAND}, @@ -1122,6 +1140,7 @@ esp_err_t i2c_master_probe(i2c_master_bus_handle_t bus_handle, uint16_t address, // Reset the status to done, in order not influence next time transaction. bus_handle->status = I2C_STATUS_DONE; + bus_handle->bypass_nack_log = false; i2c_ll_disable_intr_mask(hal->dev, I2C_LL_MASTER_EVENT_INTR); xSemaphoreGive(bus_handle->bus_lock_mux); return ret; diff --git a/components/driver/i2c/i2c_private.h b/components/driver/i2c/i2c_private.h index fde194dacbf1..8d09ccdf7b4c 100644 --- a/components/driver/i2c/i2c_private.h +++ b/components/driver/i2c/i2c_private.h @@ -126,7 +126,8 @@ struct i2c_master_bus_t { bool trans_over_buffer; // Data length is more than hardware fifo length, needs interrupt. bool async_trans; // asynchronous transaction, true after callback is installed. bool ack_check_disable; // Disable ACK check - volatile bool trans_done; // transaction command finish + volatile bool trans_done; // transaction command finish + bool bypass_nack_log; // Bypass the error log. Sometimes the error is expected. SLIST_HEAD(i2c_master_device_list_head, i2c_master_device_list) device_list; // I2C device (instance) list // asnyc trans members bool async_break; // break transaction loop flag. diff --git a/components/driver/test_apps/i2c_test_apps/main/test_i2c_common.c b/components/driver/test_apps/i2c_test_apps/main/test_i2c_common.c index b3e5a15e6fe3..53ad7f4326fe 100644 --- a/components/driver/test_apps/i2c_test_apps/main/test_i2c_common.c +++ b/components/driver/test_apps/i2c_test_apps/main/test_i2c_common.c @@ -167,6 +167,41 @@ TEST_CASE("I2C master probe device test", "[i2c]") TEST_ESP_OK(i2c_del_master_bus(bus_handle)); } +TEST_CASE("probe test after general call (0x00 0x06)", "[i2c]") +{ + uint8_t data_wr[1] = { 0x06 }; + + i2c_master_bus_config_t i2c_mst_config = { + .clk_source = I2C_CLK_SRC_DEFAULT, + .i2c_port = TEST_I2C_PORT, + .scl_io_num = I2C_MASTER_SCL_IO, + .sda_io_num = I2C_MASTER_SDA_IO, + .flags.enable_internal_pullup = true, + }; + i2c_master_bus_handle_t bus_handle; + + TEST_ESP_OK(i2c_new_master_bus(&i2c_mst_config, &bus_handle)); + + i2c_device_config_t dev_cfg1 = { + .dev_addr_length = I2C_ADDR_BIT_LEN_7, + .device_address = 0x00, + .scl_speed_hz = 100000, + }; + + i2c_master_dev_handle_t dev_handle1; + TEST_ESP_OK(i2c_master_bus_add_device(bus_handle, &dev_cfg1, &dev_handle1)); + + TEST_ESP_ERR(ESP_ERR_INVALID_STATE, i2c_master_transmit(dev_handle1, data_wr, 1, 200)); + + for (int i = 1; i < 0x7f; i++) { + TEST_ESP_ERR(ESP_ERR_NOT_FOUND, i2c_master_probe(bus_handle, i, 800)); + } + + TEST_ESP_OK(i2c_master_bus_rm_device(dev_handle1)); + + TEST_ESP_OK(i2c_del_master_bus(bus_handle)); +} + #define LENGTH 48 static IRAM_ATTR bool test_master_tx_done_callback(i2c_master_dev_handle_t i2c_dev, const i2c_master_event_data_t *evt_data, void *arg) From a44f8179deceab455b8ae2f7002c9c8e295776ea Mon Sep 17 00:00:00 2001 From: Cao Sen Miao Date: Thu, 26 Oct 2023 14:04:00 +0800 Subject: [PATCH 11/17] refactor(i2c): Add reset and clock control to i2c ll layer --- components/driver/i2c/i2c.c | 43 +++++++++++++++---- components/driver/i2c/i2c_common.c | 16 ++++--- components/driver/i2c/i2c_master.c | 16 +++++-- components/driver/i2c/i2c_private.h | 13 ++++++ components/driver/i2c/i2c_slave.c | 4 +- components/hal/esp32/include/hal/i2c_ll.h | 46 +++++++++++++++++++++ components/hal/esp32c2/include/hal/i2c_ll.h | 33 +++++++++++++++ components/hal/esp32c3/include/hal/i2c_ll.h | 33 +++++++++++++++ components/hal/esp32c6/include/hal/i2c_ll.h | 24 +++++++++++ components/hal/esp32h2/include/hal/i2c_ll.h | 22 ++++++++++ components/hal/esp32p4/include/hal/i2c_ll.h | 45 +++++++++++++++++++- components/hal/esp32s2/include/hal/i2c_ll.h | 46 +++++++++++++++++++++ components/hal/esp32s3/include/hal/i2c_ll.h | 41 ++++++++++++++++++ components/hal/i2c_hal.c | 7 ++-- components/hal/include/hal/i2c_hal.h | 30 ++++++++++++-- 15 files changed, 392 insertions(+), 27 deletions(-) diff --git a/components/driver/i2c/i2c.c b/components/driver/i2c/i2c.c index 1177ebca8b1e..658abff1e9fc 100644 --- a/components/driver/i2c/i2c.c +++ b/components/driver/i2c/i2c.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -110,6 +110,18 @@ static const char *I2C_TAG = "i2c"; #endif #define I2C_MEM_ALLOC_CAPS_DEFAULT MALLOC_CAP_DEFAULT +#if SOC_PERIPH_CLK_CTRL_SHARED +#define I2C_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC() +#else +#define I2C_CLOCK_SRC_ATOMIC() +#endif + +#if !SOC_RCC_IS_INDEPENDENT +#define I2C_RCC_ATOMIC() PERIPH_RCC_ATOMIC() +#else +#define I2C_RCC_ATOMIC() +#endif + /** * I2C bus are defined in the header files, let's check that the values are correct */ @@ -240,7 +252,9 @@ static void i2c_hw_disable(i2c_port_t i2c_num) { I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); if (i2c_context[i2c_num].hw_enabled != false) { - periph_module_disable(i2c_periph_signal[i2c_num].module); + I2C_RCC_ATOMIC() { + i2c_ll_enable_bus_clock(i2c_num, false); + } i2c_context[i2c_num].hw_enabled = false; } I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); @@ -250,7 +264,10 @@ static void i2c_hw_enable(i2c_port_t i2c_num) { I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); if (i2c_context[i2c_num].hw_enabled != true) { - periph_module_enable(i2c_periph_signal[i2c_num].module); + I2C_RCC_ATOMIC() { + i2c_ll_enable_bus_clock(i2c_num, true); + i2c_ll_reset_register(i2c_num); + } i2c_context[i2c_num].hw_enabled = true; } I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); @@ -375,7 +392,9 @@ esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode, size_t slv_rx_ return ESP_FAIL; } i2c_hw_enable(i2c_num); - i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num); + I2C_CLOCK_SRC_ATOMIC() { + i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num); + } //Disable I2C interrupt. i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK); i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK); @@ -478,7 +497,9 @@ esp_err_t i2c_driver_delete(i2c_port_t i2c_num) } #endif - i2c_hal_deinit(&i2c_context[i2c_num].hal); + I2C_CLOCK_SRC_ATOMIC() { + i2c_hal_deinit(&i2c_context[i2c_num].hal); + } free(p_i2c_obj[i2c_num]); p_i2c_obj[i2c_num] = NULL; @@ -746,7 +767,9 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf) return ret; } i2c_hw_enable(i2c_num); - i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num); + I2C_CLOCK_SRC_ATOMIC() { + i2c_hal_init(&i2c_context[i2c_num].hal, i2c_num); + } I2C_ENTER_CRITICAL(&(i2c_context[i2c_num].spinlock)); i2c_ll_disable_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK); i2c_ll_clear_intr_mask(i2c_context[i2c_num].hal.dev, I2C_LL_INTR_MASK); @@ -754,7 +777,9 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf) if (i2c_conf->mode == I2C_MODE_SLAVE) { //slave mode i2c_hal_slave_init(&(i2c_context[i2c_num].hal)); i2c_ll_slave_tx_auto_start_en(i2c_context[i2c_num].hal.dev, true); - i2c_ll_set_source_clk(i2c_context[i2c_num].hal.dev, src_clk); + I2C_CLOCK_SRC_ATOMIC() { + i2c_ll_set_source_clk(i2c_context[i2c_num].hal.dev, src_clk); + } i2c_ll_set_slave_addr(i2c_context[i2c_num].hal.dev, i2c_conf->slave.slave_addr, i2c_conf->slave.addr_10bit_en); i2c_ll_set_rxfifo_full_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_FULL_THRESH_VAL); i2c_ll_set_txfifo_empty_thr(i2c_context[i2c_num].hal.dev, I2C_FIFO_EMPTY_THRESH_VAL); @@ -768,7 +793,9 @@ esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf) i2c_hal_master_init(&(i2c_context[i2c_num].hal)); //Default, we enable hardware filter i2c_ll_master_set_filter(i2c_context[i2c_num].hal.dev, I2C_FILTER_CYC_NUM_DEF); - i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk, s_get_src_clk_freq(src_clk)); + I2C_CLOCK_SRC_ATOMIC() { + i2c_hal_set_bus_timing(&(i2c_context[i2c_num].hal), i2c_conf->master.clk_speed, src_clk, s_get_src_clk_freq(src_clk)); + } } i2c_ll_update(i2c_context[i2c_num].hal.dev); I2C_EXIT_CRITICAL(&(i2c_context[i2c_num].spinlock)); diff --git a/components/driver/i2c/i2c_common.c b/components/driver/i2c/i2c_common.c index f9cb44da5944..70a3f8241462 100644 --- a/components/driver/i2c/i2c_common.c +++ b/components/driver/i2c/i2c_common.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -56,9 +56,13 @@ static esp_err_t s_i2c_bus_handle_aquire(i2c_port_num_t port_num, i2c_bus_handle bus->bus_mode = mode; // Enable the I2C module - periph_module_enable(i2c_periph_signal[port_num].module); - periph_module_reset(i2c_periph_signal[port_num].module); - i2c_hal_init(&bus->hal, port_num); + I2C_RCC_ATOMIC() { + i2c_ll_enable_bus_clock(bus->port_num, true); + i2c_ll_reset_register(bus->port_num); + } + I2C_CLOCK_SRC_ATOMIC() { + i2c_hal_init(&bus->hal, port_num); + } } } else { ESP_LOGE(TAG, "I2C bus id(%d) has already been acquired", port_num); @@ -131,7 +135,9 @@ esp_err_t i2c_release_bus_handle(i2c_bus_handle_t i2c_bus) ESP_RETURN_ON_ERROR(esp_pm_lock_delete(i2c_bus->pm_lock), TAG, "delete pm_lock failed"); } // Disable I2C module - periph_module_disable(i2c_periph_signal[port_num].module); + I2C_RCC_ATOMIC() { + i2c_ll_enable_bus_clock(port_num, false); + } free(i2c_bus); } } diff --git a/components/driver/i2c/i2c_master.c b/components/driver/i2c/i2c_master.c index 21060fa0fbb1..ac54ba5d0496 100644 --- a/components/driver/i2c/i2c_master.c +++ b/components/driver/i2c/i2c_master.c @@ -92,8 +92,9 @@ static esp_err_t s_i2c_hw_fsm_reset(i2c_master_bus_handle_t i2c_master) //to reset the I2C hw module, we need re-enable the hw s_i2c_master_clear_bus(i2c_master->base); - periph_module_disable(i2c_periph_signal[i2c_master->base->port_num].module); - periph_module_enable(i2c_periph_signal[i2c_master->base->port_num].module); + I2C_RCC_ATOMIC() { + i2c_ll_reset_register(i2c_master->base->port_num); + } i2c_hal_master_init(hal); i2c_ll_disable_intr_mask(hal->dev, I2C_LL_INTR_MASK); @@ -546,7 +547,11 @@ static esp_err_t s_i2c_transaction_start(i2c_master_dev_handle_t i2c_dev, int xf i2c_master->read_len_static = 0; i2c_hal_master_set_scl_timeout_val(hal, i2c_dev->scl_wait_us, i2c_master->base->clk_src_freq_hz); - i2c_hal_set_bus_timing(hal, i2c_dev->scl_speed_hz, i2c_master->base->clk_src, i2c_master->base->clk_src_freq_hz); + + I2C_CLOCK_SRC_ATOMIC() { + i2c_ll_set_source_clk(hal->dev, i2c_master->base->clk_src); + i2c_hal_set_bus_timing(hal, i2c_dev->scl_speed_hz, i2c_master->base->clk_src, i2c_master->base->clk_src_freq_hz); + } i2c_ll_master_set_fractional_divider(hal->dev, 0, 0); i2c_ll_update(hal->dev); @@ -1125,7 +1130,10 @@ esp_err_t i2c_master_probe(i2c_master_bus_handle_t bus_handle, uint16_t address, // I2C probe does not have i2c device module. So set the clock parameter independently // This will not influence device transaction. - i2c_hal_set_bus_timing(hal, 100000, bus_handle->base->clk_src, bus_handle->base->clk_src_freq_hz); + I2C_CLOCK_SRC_ATOMIC() { + i2c_ll_set_source_clk(hal->dev, bus_handle->base->clk_src); + i2c_hal_set_bus_timing(hal, 100000, bus_handle->base->clk_src, bus_handle->base->clk_src_freq_hz); + } i2c_ll_master_set_fractional_divider(hal->dev, 0, 0); i2c_ll_enable_intr_mask(hal->dev, I2C_LL_MASTER_EVENT_INTR); i2c_ll_update(hal->dev); diff --git a/components/driver/i2c/i2c_private.h b/components/driver/i2c/i2c_private.h index 8d09ccdf7b4c..38776d3b9ad8 100644 --- a/components/driver/i2c/i2c_private.h +++ b/components/driver/i2c/i2c_private.h @@ -17,12 +17,25 @@ #include "freertos/task.h" #include "freertos/ringbuf.h" #include "driver/i2c_slave.h" +#include "esp_private/periph_ctrl.h" #include "esp_pm.h" #ifdef __cplusplus extern "C" { #endif +#if SOC_PERIPH_CLK_CTRL_SHARED +#define I2C_CLOCK_SRC_ATOMIC() PERIPH_RCC_ATOMIC() +#else +#define I2C_CLOCK_SRC_ATOMIC() +#endif + +#if !SOC_RCC_IS_INDEPENDENT +#define I2C_RCC_ATOMIC() PERIPH_RCC_ATOMIC() +#else +#define I2C_RCC_ATOMIC() +#endif + #if CONFIG_I2C_ISR_IRAM_SAFE #define I2C_MEM_ALLOC_CAPS (MALLOC_CAP_INTERNAL | MALLOC_CAP_8BIT) #else diff --git a/components/driver/i2c/i2c_slave.c b/components/driver/i2c/i2c_slave.c index 0376b6bbfddb..32070ebd78f1 100644 --- a/components/driver/i2c/i2c_slave.c +++ b/components/driver/i2c/i2c_slave.c @@ -247,7 +247,9 @@ esp_err_t i2c_new_slave_device(const i2c_slave_config_t *slave_config, i2c_slave #endif //Default, we enable hardware filter - i2c_ll_set_source_clk(hal->dev, slave_config->clk_source); + I2C_CLOCK_SRC_ATOMIC() { + i2c_ll_set_source_clk(hal->dev, slave_config->clk_source); + } bool addr_10bit_en = slave_config->addr_bit_len != I2C_ADDR_BIT_LEN_7; i2c_ll_set_slave_addr(hal->dev, slave_config->slave_addr, addr_10bit_en); #if SOC_I2C_SLAVE_SUPPORT_BROADCAST diff --git a/components/hal/esp32/include/hal/i2c_ll.h b/components/hal/esp32/include/hal/i2c_ll.h index e78a7ff32d9b..243f732756f0 100644 --- a/components/hal/esp32/include/hal/i2c_ll.h +++ b/components/hal/esp32/include/hal/i2c_ll.h @@ -13,6 +13,7 @@ #include "soc/i2c_periph.h" #include "soc/i2c_struct.h" #include "soc/clk_tree_defs.h" +#include "soc/dport_reg.h" #include "hal/i2c_types.h" #include "esp_attr.h" #include "hal/assert.h" @@ -709,6 +710,51 @@ static inline void i2c_ll_update(i2c_dev_t *hw) ;// ESP32 do not support } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + if (i2c_port == 0) { + uint32_t reg_val = DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG); + reg_val &= ~DPORT_I2C_EXT0_CLK_EN; + reg_val |= enable << 7; + DPORT_WRITE_PERI_REG(DPORT_PERIP_CLK_EN_REG, reg_val); + } else if (i2c_port == 1) { + uint32_t reg_val = DPORT_READ_PERI_REG(DPORT_PERIP_CLK_EN_REG); + reg_val &= ~DPORT_I2C_EXT1_CLK_EN; + reg_val |= enable << 18; + DPORT_WRITE_PERI_REG(DPORT_PERIP_CLK_EN_REG, reg_val); + } +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0) + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + if (i2c_port == 0) { + DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, DPORT_I2C_EXT0_RST); + DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, 0); + } else if (i2c_port == 1) { + DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, DPORT_I2C_EXT1_RST); + DPORT_WRITE_PERI_REG(DPORT_PERIP_RST_EN_REG, 0); + } +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0) + /** * @brief Set whether slave should auto start, or only start with start signal from master * diff --git a/components/hal/esp32c2/include/hal/i2c_ll.h b/components/hal/esp32c2/include/hal/i2c_ll.h index a7550cab6912..8fa30c225697 100644 --- a/components/hal/esp32c2/include/hal/i2c_ll.h +++ b/components/hal/esp32c2/include/hal/i2c_ll.h @@ -17,6 +17,7 @@ #include "hal/i2c_types.h" #include "soc/rtc_cntl_reg.h" #include "soc/clk_tree_defs.h" +#include "soc/system_struct.h" #include "esp_attr.h" #ifdef __cplusplus @@ -112,6 +113,38 @@ static inline void i2c_ll_update(i2c_dev_t *hw) hw->ctr.conf_upgate = 1; } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + (void)i2c_port; + SYSTEM.perip_clk_en0.i2c_ext0_clk_en = enable; +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0) + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + (void)i2c_port; + SYSTEM.perip_rst_en0.i2c_ext0_rst = 1; + SYSTEM.perip_rst_en0.i2c_ext0_rst = 0; +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0) + /** * @brief Configure the I2C bus timing related register. * diff --git a/components/hal/esp32c3/include/hal/i2c_ll.h b/components/hal/esp32c3/include/hal/i2c_ll.h index 11091748eed2..f22d15947f75 100644 --- a/components/hal/esp32c3/include/hal/i2c_ll.h +++ b/components/hal/esp32c3/include/hal/i2c_ll.h @@ -17,6 +17,7 @@ #include "hal/i2c_types.h" #include "soc/rtc_cntl_reg.h" #include "soc/clk_tree_defs.h" +#include "soc/system_struct.h" #include "esp_attr.h" #include "hal/misc.h" @@ -126,6 +127,38 @@ static inline void i2c_ll_update(i2c_dev_t *hw) hw->ctr.conf_upgate = 1; } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + (void)i2c_port; + SYSTEM.perip_clk_en0.reg_i2c_ext0_clk_en = enable; +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0) + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + (void)i2c_port; + SYSTEM.perip_rst_en0.reg_i2c_ext0_rst = 1; + SYSTEM.perip_rst_en0.reg_i2c_ext0_rst = 0; +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0) + /** * @brief Configure the I2C bus timing related register. * diff --git a/components/hal/esp32c6/include/hal/i2c_ll.h b/components/hal/esp32c6/include/hal/i2c_ll.h index 6b6aa120f154..2d465c20a433 100644 --- a/components/hal/esp32c6/include/hal/i2c_ll.h +++ b/components/hal/esp32c6/include/hal/i2c_ll.h @@ -128,6 +128,30 @@ static inline void i2c_ll_update(i2c_dev_t *hw) hw->ctr.conf_upgate = 1; } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + (void)i2c_port; + PCR.i2c_conf.i2c_clk_en = enable; +} + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + (void)i2c_port; + PCR.i2c_conf.i2c_rst_en = 1; + PCR.i2c_conf.i2c_rst_en = 0; +} + /** * @brief Configure the I2C bus timing related register. * diff --git a/components/hal/esp32h2/include/hal/i2c_ll.h b/components/hal/esp32h2/include/hal/i2c_ll.h index 26ff59a11aa3..1f21cae77c9f 100644 --- a/components/hal/esp32h2/include/hal/i2c_ll.h +++ b/components/hal/esp32h2/include/hal/i2c_ll.h @@ -127,6 +127,28 @@ static inline void i2c_ll_update(i2c_dev_t *hw) hw->ctr.conf_upgate = 1; } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + PCR.i2c[i2c_port].i2c_conf.i2c_clk_en = enable; +} + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + PCR.i2c[i2c_port].i2c_conf.i2c_rst_en = 1; + PCR.i2c[i2c_port].i2c_conf.i2c_rst_en = 0; +} + /** * @brief Configure the I2C bus timing related register. * diff --git a/components/hal/esp32p4/include/hal/i2c_ll.h b/components/hal/esp32p4/include/hal/i2c_ll.h index 88940be813dc..cb2a0af0cd5e 100644 --- a/components/hal/esp32p4/include/hal/i2c_ll.h +++ b/components/hal/esp32p4/include/hal/i2c_ll.h @@ -132,6 +132,45 @@ static inline void i2c_ll_update(i2c_dev_t *hw) hw->ctr.conf_upgate = 1; } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + if (i2c_port == 0) { + HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c0_apb_clk_en = enable; + } else if (i2c_port == 1) { + HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c1_apb_clk_en = enable; + } +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0) + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + if (i2c_port == 0) { + HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c0 = 1; + HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c0 = 0; + } else if (i2c_port == 1) { + HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c1 = 1; + HP_SYS_CLKRST.hp_rst_en1.reg_rst_en_i2c1 = 0; + } +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0) + /** * @brief Configure the I2C bus timing related register. * @@ -754,6 +793,10 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c } +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_set_source_clk(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_set_source_clk(__VA_ARGS__);} while(0) + /** * @brief Enable I2C peripheral controller clock * @@ -763,10 +806,8 @@ static inline void i2c_ll_set_source_clk(i2c_dev_t *hw, i2c_clock_source_t src_c static inline void i2c_ll_enable_controller_clock(i2c_dev_t *hw, bool en) { if (hw == &I2C0) { - HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c0_apb_clk_en = en; HP_SYS_CLKRST.peri_clk_ctrl10.reg_i2c0_clk_en = en; } else if (hw == &I2C1) { - HP_SYS_CLKRST.soc_clk_ctrl2.reg_i2c1_apb_clk_en = en; HP_SYS_CLKRST.peri_clk_ctrl10.reg_i2c1_clk_en = en; } else if (hw == &LP_I2C) { // Do nothing diff --git a/components/hal/esp32s2/include/hal/i2c_ll.h b/components/hal/esp32s2/include/hal/i2c_ll.h index f06851299684..f22accc1847f 100644 --- a/components/hal/esp32s2/include/hal/i2c_ll.h +++ b/components/hal/esp32s2/include/hal/i2c_ll.h @@ -11,6 +11,7 @@ #include "soc/i2c_periph.h" #include "soc/i2c_struct.h" #include "soc/clk_tree_defs.h" +#include "soc/system_reg.h" #include "hal/i2c_types.h" #include "esp_attr.h" #include "hal/misc.h" @@ -758,6 +759,51 @@ static inline void i2c_ll_update(i2c_dev_t *hw) ;// ESP32S2 do not support } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + if (i2c_port == 0) { + uint32_t reg_val = READ_PERI_REG(DPORT_PERIP_CLK_EN0_REG); + reg_val &= ~DPORT_I2C_EXT0_CLK_EN_M; + reg_val |= enable << DPORT_I2C_EXT0_CLK_EN_S; + WRITE_PERI_REG(DPORT_PERIP_CLK_EN0_REG, reg_val); + } else if (i2c_port == 1) { + uint32_t reg_val = READ_PERI_REG(DPORT_PERIP_CLK_EN0_REG); + reg_val &= ~DPORT_I2C_EXT1_CLK_EN_M; + reg_val |= enable << DPORT_I2C_EXT1_CLK_EN_S; + WRITE_PERI_REG(DPORT_PERIP_CLK_EN0_REG, reg_val); + } +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0) + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + if (i2c_port == 0) { + WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, DPORT_I2C_EXT0_RST_M); + WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, 0); + } else if (i2c_port == 1) { + WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, DPORT_I2C_EXT1_RST_M); + WRITE_PERI_REG(DPORT_PERIP_RST_EN0_REG, 0); + } +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0) + /** * @brief Set whether slave should auto start, or only start with start signal from master * diff --git a/components/hal/esp32s3/include/hal/i2c_ll.h b/components/hal/esp32s3/include/hal/i2c_ll.h index f833cf9aa539..97131a888b66 100644 --- a/components/hal/esp32s3/include/hal/i2c_ll.h +++ b/components/hal/esp32s3/include/hal/i2c_ll.h @@ -15,6 +15,7 @@ #include "soc/soc_caps.h" #include "soc/i2c_struct.h" #include "soc/clk_tree_defs.h" +#include "soc/system_struct.h" #include "hal/i2c_types.h" #include "esp_attr.h" #include "esp_assert.h" @@ -126,6 +127,46 @@ static inline void i2c_ll_update(i2c_dev_t *hw) hw->ctr.conf_upgate = 1; } +/** + * @brief Enable the bus clock for I2C module + * + * @param i2c_port I2C port id + * @param enable true to enable, false to disable + */ +static inline void i2c_ll_enable_bus_clock(int i2c_port, bool enable) +{ + if (i2c_port == 0) { + SYSTEM.perip_clk_en0.i2c_ext0_clk_en = enable; + } else if (i2c_port == 1) { + SYSTEM.perip_clk_en0.i2c_ext1_clk_en = enable; + } +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_enable_bus_clock(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_enable_bus_clock(__VA_ARGS__);} while(0) + +/** + * @brief Reset the I2C module + * + * @param i2c_port Group ID + */ +static inline void i2c_ll_reset_register(int i2c_port) +{ + if (i2c_port == 0) { + SYSTEM.perip_rst_en0.i2c_ext0_rst = 1; + SYSTEM.perip_rst_en0.i2c_ext0_rst = 0; + } else if (i2c_port == 1) { + SYSTEM.perip_rst_en0.i2c_ext1_rst = 1; + SYSTEM.perip_rst_en0.i2c_ext1_rst = 0; + } + +} + +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_ll_reset_register(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; i2c_ll_reset_register(__VA_ARGS__);} while(0) + /** * @brief Configure the I2C bus timing related register. * diff --git a/components/hal/i2c_hal.c b/components/hal/i2c_hal.c index 3e43f5602785..2daa902bb721 100644 --- a/components/hal/i2c_hal.c +++ b/components/hal/i2c_hal.c @@ -22,9 +22,8 @@ void i2c_hal_slave_init(i2c_hal_context_t *hal) } #endif -void i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq) +void _i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq) { - i2c_ll_set_source_clk(hal->dev, src_clk); i2c_hal_clk_config_t clk_cal = {0}; i2c_ll_master_cal_bus_clk(source_freq, scl_freq, &clk_cal); i2c_ll_master_set_bus_timing(hal->dev, &clk_cal); @@ -45,7 +44,7 @@ void i2c_hal_master_init(i2c_hal_context_t *hal) i2c_ll_rxfifo_rst(hal->dev); } -void i2c_hal_init(i2c_hal_context_t *hal, int i2c_port) +void _i2c_hal_init(i2c_hal_context_t *hal, int i2c_port) { if (hal->dev == NULL) { hal->dev = I2C_LL_GET_HW(i2c_port); @@ -53,7 +52,7 @@ void i2c_hal_init(i2c_hal_context_t *hal, int i2c_port) i2c_ll_enable_controller_clock(hal->dev, true); } -void i2c_hal_deinit(i2c_hal_context_t *hal) +void _i2c_hal_deinit(i2c_hal_context_t *hal) { i2c_ll_enable_controller_clock(hal->dev, false); hal->dev = NULL; diff --git a/components/hal/include/hal/i2c_hal.h b/components/hal/include/hal/i2c_hal.h index 831c7b6f528a..b7f7518e1f4b 100644 --- a/components/hal/include/hal/i2c_hal.h +++ b/components/hal/include/hal/i2c_hal.h @@ -93,7 +93,15 @@ void i2c_hal_master_init(i2c_hal_context_t *hal); * * @return None */ -void i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq); +void _i2c_hal_set_bus_timing(i2c_hal_context_t *hal, int scl_freq, i2c_clock_source_t src_clk, int source_freq); + +#if SOC_PERIPH_CLK_CTRL_SHARED +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_hal_set_bus_timing(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_set_bus_timing(__VA_ARGS__);} while(0) +#else +#define i2c_hal_set_bus_timing(...) _i2c_hal_set_bus_timing(__VA_ARGS__) +#endif /** * @brief I2C hardware FSM reset @@ -139,14 +147,30 @@ void i2c_hal_master_set_scl_timeout_val(i2c_hal_context_t *hal, uint32_t timeout * @param hal Context of the HAL * @param i2c_port I2C port number. */ -void i2c_hal_init(i2c_hal_context_t *hal, int i2c_port); +void _i2c_hal_init(i2c_hal_context_t *hal, int i2c_port); + +#if SOC_PERIPH_CLK_CTRL_SHARED +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_hal_init(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_init(__VA_ARGS__);} while(0) +#else +#define i2c_hal_init(...) _i2c_hal_init(__VA_ARGS__) +#endif /** * @brief Deinit I2C hal layer * * @param hal Context of the HAL */ -void i2c_hal_deinit(i2c_hal_context_t *hal); +void _i2c_hal_deinit(i2c_hal_context_t *hal); + +#if SOC_PERIPH_CLK_CTRL_SHARED +/// use a macro to wrap the function, force the caller to use it in a critical section +/// the critical section needs to declare the __DECLARE_RCC_ATOMIC_ENV variable in advance +#define i2c_hal_deinit(...) do {(void)__DECLARE_RCC_ATOMIC_ENV; _i2c_hal_deinit(__VA_ARGS__);} while(0) +#else +#define i2c_hal_deinit(...) _i2c_hal_deinit(__VA_ARGS__) +#endif /** * @brief Start I2C master transaction From 4ce9b783f3c658d1752d836505c0fd46d67a3d52 Mon Sep 17 00:00:00 2001 From: "C.S.M" Date: Tue, 18 Jun 2024 15:01:18 +0800 Subject: [PATCH 12/17] fix(i2c): Fix i2c not release semaphore in command send loop --- components/driver/i2c/i2c_master.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/components/driver/i2c/i2c_master.c b/components/driver/i2c/i2c_master.c index ac54ba5d0496..fbd5d4c5bc76 100644 --- a/components/driver/i2c/i2c_master.c +++ b/components/driver/i2c/i2c_master.c @@ -419,6 +419,8 @@ static void s_i2c_send_commands(i2c_master_bus_handle_t i2c_master, TickType_t t i2c_master->cmd_idx = 0; i2c_master->trans_idx = 0; atomic_store(&i2c_master->status, I2C_STATUS_TIMEOUT); + ESP_LOGE(TAG, "I2C software timeout"); + xSemaphoreGive(i2c_master->cmd_semphr); return; } From aacddac2ddb8d97894fe7078136f4eb0638e3577 Mon Sep 17 00:00:00 2001 From: yinqingzhao Date: Fri, 21 Jun 2024 11:36:19 +0800 Subject: [PATCH 13/17] docs(wifi):update TWT docs --- docs/_static/itwt_10s_current.png | Bin 0 -> 107886 bytes docs/_static/itwt_30s_current.png | Bin 0 -> 69190 bytes docs/_static/itwt_setup.png | Bin 0 -> 48712 bytes docs/_static/itwt_suspend.png | Bin 0 -> 43566 bytes docs/_static/itwt_teardown.png | Bin 0 -> 38537 bytes docs/zh_CN/api-guides/low-power-mode.rst | 290 +++++++++++++++++++++++ 6 files changed, 290 insertions(+) create mode 100644 docs/_static/itwt_10s_current.png create mode 100644 docs/_static/itwt_30s_current.png create mode 100644 docs/_static/itwt_setup.png create mode 100644 docs/_static/itwt_suspend.png create mode 100644 docs/_static/itwt_teardown.png diff --git a/docs/_static/itwt_10s_current.png b/docs/_static/itwt_10s_current.png new file mode 100644 index 0000000000000000000000000000000000000000..bfd315c042e4113523752e3dc1e955d64283c81f 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--git a/docs/zh_CN/api-guides/low-power-mode.rst b/docs/zh_CN/api-guides/low-power-mode.rst index 2dcf30dd9098..4d6851ef64f7 100644 --- a/docs/zh_CN/api-guides/low-power-mode.rst +++ b/docs/zh_CN/api-guides/low-power-mode.rst @@ -731,3 +731,293 @@ Deep-sleep 有如下可配置选项： .. only:: esp32c2 平均电流约 4.9 μA + +.. only:: esp32c6 + + 目标唤醒时间 (TWT) + ---------------------------------- + + 目标唤醒时间 (Target Wake Time, TWT) 是 Wi-Fi 6 中引入的一项特性，旨在降低设备功耗和提高网络效率。 + + 在以往的 Wi-Fi 节能机制中，设备可能需要在每个 DTIM 周期醒来与 AP 交换数据，而在 TWT 机制中支持 AP 和设备协商得到特定的唤醒时间，设备会在这些时间点醒来与 AP 进行数据交换，而其余时间则处于休眠状态。TWT 协商的唤醒和休眠时间取决于设备具体的应用需求。例如，有些传感器设备需要定时上传数据，在该场景下设备可以与 AP 建立 TWT 协商，相隔多个小时交换一次数据。实际应用中可根据具体需求定制唤醒时间，在不影响设备正常工作的情况下降低功耗。 + + AP 可以与多个设备建立 TWT 协商。利用 Wi-Fi 6 的多用户特性，AP 可以对上行和下行数据传输做出合理协调，从而减少信道竞争，提高传输效率。 + + TWT 类型 + ++++++++++ + + 根据协商类型和工作模式，可以把 TWT 分为： + + - **Individual TWT (iTWT)** + + iTWT 模式下，AP 与终端设备建立的是一对一的 TWT 协商。 + + - **Broadcast TWT (bTWT)** + + 在 bTWT 模式下，AP 通过 Beacon 帧广播 TWT 信息，以组的形式来管理多个终端设备的 TWT 过程。终端设备可以根据 Beacon 中的 TWT 信息选择执行加组操作。 + + .. note:: + 在建立 TWT 协商前，需要确认 AP 是否支持并开启了 TWT 功能。{IDF_TARGET_NAME} 当前只支持 iTWT 模式。 + + TWT 工作流程 + ++++++++++++ + TWT 工作流程一般分为 TWT 协商建立、TWT 协商暂停/恢复、TWT 协商终止。TWT 协商建立后，Station 就可以按照协商的参数进入休眠状态，直到约定好的下一个 TWT 时间点到来时苏醒。 + 对已经建立的 TWT，用户可以根据需求协商暂停/恢复 TWT 或者终止 TWT。 + + - TWT 协商建立 + + - Individual TWT 协商建立 + + 在 iTWT 协商建立过程中，通常由 Station 充当请求发起方发送 TWT 请求，而后 AP 作为接收方对该请求做出回应。AP 也可以主动向 Station 发起 TWT 协商建立过程。 + 在成功建立起 iTWT 协商后，Station 可以进入休眠状态，直到约定好的下一个 TWT 时间点到来时苏醒，该时间点通过和 AP 间的协商得到。Station 醒来后和 AP 进行数据交换，这段时间被称为 TWT 服务时间 (Service Period, SP)。 + TWT SP 的持续时间被称为 TWT Wake Duration，其最小值为 256 微秒。当一次 TWT SP 结束后，Station 进入休眠状态直到下次 TWT SP 醒来进行数据传输。本次 TWT SP 的起始到下次 TWT SP 的起始的时间间隔被称为 TWT Wake Interval。下图为基本的 iTWT 示例： + + .. figure:: ../../_static/itwt_setup.png + :align: center + + Individual TWT 协商建立过程示例 + + Station 在 iTWT 协商建立时可以发送不同类型的请求，AP 会根据请求类型及参数做出对应的回复。用户需要根据 AP 回复中的类型和具体参数决定后续的操作逻辑。Station 所发送的请求类型有 ``Request``、``Suggest`` 和 ``Demand``。 + AP 的回复类型可分为 ``Accept``、``Alternate`` 和 ``Dictate``。下表描述了发送不同请求时 AP 可能的回复以及不同情况下对应的含义： + + .. list-table:: + :header-rows: 1 + :widths: 20 10 40 + + * - 请求类型 + - AP 回复 + - 含义 + * - Request, Suggest or Demand + - No response + - 在该情况下 AP 不会与 Station 建立 iTWT 协商。 + * - Suggest or Request + - Accept + - AP 同意建立 iTWT 协商，其使用的参数以回复中 TWT 参数为准。回复中的 TWT 参数有可能与请求中不一致。 + * - Demand + - Accept + - AP 同意建立 iTWT 协商，且回复中的 TWT 参数与请求中的一致。 + * - Demand or Suggest + - Alternate + - AP 使用该回复类型代表给 Station提供一组备选 TWT 参数，此时不会建立 iTWT 协商。后续 Station 可以发送新的请求，但 AP 仍有可能使用该组参数。 + * - Demand or Suggest + - Dictate + - AP 使用该回复类型代表给 Station 提供一组备选 TWT 参数，此时不会建立 iTWT 协商，同时也表明 AP 不接受除该组参数以外的其他参数。后续 Station 可以发送新的请求，但只有参数与所提供的备选参数一致才会收到 Accept 回复。 + * - Request, Suggest or Demand + - Reject + - 在该情况下 AP 不会与 station 建立 iTWT 协商。后续 Station 可以更改 TWT 参数发送新的请求。 + + 在 TWT SP 中依照数据交互时的操作可以将 TWT 进一步地细分为多种类型，下表描述了这些类型间的差异： + + .. list-table:: + :header-rows: 1 + :widths: 10 20 + + * - Types + - 含义 + * - Trigger-enabled + - AP 会在 SP 中使用 Trigger 帧来协调 Station 的数据传输。 + * - Non trigger-enabled + - 在 SP 中不需要使用 Trigger 帧。 + * - Announced + - Station 会发送 QoS Null 帧告知 AP 其唤醒状态。 + * - Unannounced + - 不需要发送 QoS Null 帧。 + + - Broadcast TWT 协商建立 + + 与 iTWT 不同的是，在 bTWT 模式下 AP 将 TWT 信息放在 Beacon 帧中进行广播宣告。Station 接收到 Beacon 后，可以向 AP 发送请求申请选择加入某个 TWT。 + 当建立起 bTWT 协商后， Station 和 AP 会在协商好的 TWT SP 中进行数据传输。 + + 与 iTWT 类似，可以把 bTWT 进一步分成 Trigger-enabled 和 Non trigger-enabled 类型，以及 Announced 和 Unannounced 类型，具体的行为差异可以参考 iTWT 中的描述。 + + - TWT 协商暂停/恢复 + + 建立起 TWT 协商后， Station 可以通过向 AP 发送 TWT Information 帧暂停或者恢复指定的 TWT 协商。由 flow_id 来标识需要暂停或者恢复的 TWT 协商，具体可以参考 TWT 参数配置。 + + .. figure:: ../../_static/itwt_suspend.png + :align: center + + Individual TWT 协商暂停/恢复过程示例 + + - TWT 协商终止 + + 建立起 TWT 协商后， Station 可以通过向 AP 发送 TWT Teardown 帧终止指定的 TWT 协商。由 flow_id 来标识需要终止的 TWT 协商，具体可以参考 TWT 参数配置。 + + .. figure:: ../../_static/itwt_teardown.png + :align: center + + Individual TWT 协商终止过程示例 + + TWT 参数配置 + ++++++++++++ + + 在使用过程中，需要配置 TWT 和低功耗模式的相关参数，其中低功耗模式相关参数决定了设备在休眠状态下的行为模式。本小节将主要阐述如何配置 TWT，有关低功耗模式下的参数配置，请参考 `如何配置 Wi-Fi 场景下低功耗模式`_。 + + - Individual TWT 参数配置 + + 在建立 Station 和 AP 间的 iTWT 时，使用 :component_file:`esp_wifi/include/esp_wifi_he_types.h` 中定义的结构体 :cpp:type:`wifi_twt_setup_config_t` 来配置 TWT 的相关参数，其定义如下： + + .. code-block:: C + + typedef struct + { + wifi_twt_setup_cmds_t setup_cmd; + uint16_t trigger :1; + uint16_t flow_type :1; + uint16_t flow_id :3; + uint16_t wake_invl_expn :5; + uint16_t wake_duration_unit :1; + uint16_t reserved :5; + uint8_t min_wake_dura; + uint16_t wake_invl_mant; + uint16_t twt_id; + uint16_t timeout_time_ms; + } wifi_twt_setup_config_t; + + :cpp:type:`wifi_twt_setup_config_t` 中各个字段的含义如下： + + .. list-table:: + :header-rows: 1 + :widths: 15 45 + :align: center + + * - 字段 + - 描述 + * - setup_cmd + - 指示了 TWT 建立时请求和回复使用的命令类型，具体类型请参阅 :cpp:type:`wifi_twt_setup_cmds_t` 。 + * - trigger + - 值为 1 时配置 TWT 类型为 Trigger-enabled，值为 0 时配置为 Non trigger-enabled。 + * - flow_type + - 值为 1 时配置 TWT 类型为 Unannounced，值为 0 时配置为 Announced。 + * - flow_id + - 当建立起一个 iTWT 协商后，AP 会为其分配 flow_id。Station 在协商建立请求中可以指定 flow_id，但在 AP 的回复中该字段可能会被改变。 + * - wake_invl_expn + - TWT Wake Interval 指数部分。 + * - wake_duration_unit + - TWT Wake Duration 计数单元。为 0 代表 256 微秒，为 1 代表以 TU (1024 微秒) 为单位。 + * - reserved + - 保留字段。 + * - min_wake_dura + - 该字段代表 Station 期望处于唤醒状态的时间，以 ``wake_duration_unit`` 作为基本单位。 + * - wake_invl_mant + - TWT Wake Interval 尾数部分。 + * - twt_id + - TWT 配置标识。在发起多个 TWT 请求时，该字段用于在 handler 中区分不同的 TWT 参数配置。 + * - timeout_time_ms + - TWT 请求超时时间，单位为毫秒。 + + 需要指出的是，Station 在协商中所期望的 TWT Wake Interval 为 wake_invl_mant * 2\ :sup:`wake_invl_expn`\，单位是微秒。 + 而所期望的 TWT Wake Duration 为 min_wake_dura * wake_duration_unit。 + + .. note:: + 注意， TWT Wake Interval 和 TWT Wake Duration 的差值需要大于 10 毫秒。 + + 配置示例如下： + + .. code-block:: C + + wifi_twt_setup_config_t setup_config = { + .setup_cmd = TWT_REQUEST, + .flow_id = 0, + .twt_id = 0, + .flow_type = 0, + .min_wake_dura = 255, + .wake_duration_unit = 0, + .wake_invl_expn = 10, + .wake_invl_mant = 512, + .trigger = 1, + .timeout_time_ms = 5000, + }; + + 以上配置指定建立 TWT 请求时使用的类型为 Trigger-enabled，Announced，期望的 TWT Wake Interval 为 524288 微秒， TWT Wake Duration 为 65280 微秒。配置好 :cpp:type:`wifi_twt_setup_config_t` 后，调用 API :cpp:func:`esp_wifi_sta_itwt_setup` 向 AP 发起 iTWT 建立请求。 + + .. note:: + {IDF_TARGET_NAME} 支持用户调用 API :cpp:func:`esp_wifi_sta_itwt_set_target_wake_time_offset` 配置相对于目标唤醒时间的偏移时间。 + + TWT 事件 + ++++++++++ + + - WIFI_EVENT_ITWT_SETUP + + 发送请求后，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_SETUP` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_setup_t` 结构体中，其成员变量 status 指示了此次事件的状态。 + 当 status 为 :c:macro:`ITWT_SETUP_SUCCESS` 时代表请求成功收到了对应回复，为其他值代表请求失败。在得到请求成功的状态后，用户可以从该结构体中的 config 成员变量中得到 AP 回复中的具体参数，并根据具体参数决定后续的处理逻辑。 + 例如，Station 发送了类型为 Demand 的 TWT 请求，收到 AP 的回复类型为 Dictate，用户此时可以考察回复中的 TWT 参数是否可行，若可行便可以发送一个新的 TWT 请求与 AP 继续建立 TWT 协商，并且该请求中的 TWT 参数需要与 AP 回复中一致。 + + 在 Station 未主动发送请求时也有可能触发 :cpp:enumerator:`WIFI_EVENT_ITWT_SETUP` 事件，这种情况下对应的是 AP 主动向 Station 发起 iTWT 协商建立过程，此时 AP 向 Station 发送的帧中会带有 TWT 参数。同样地，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_SETUP` 事件的对应处理程序中获取结果并自定义处理逻辑。 + 用户需要检查 config 成员变量中 AP 发送的 TWT 参数类型，一般有两种情况： + 1. AP 发送的 TWT 参数为 Accept 类型，此时 Station 会与 AP 建立起使用该 TWT 参数的 iTWT 协商。若用户不希望建立此 iTWT 协商，可以向 AP 发送 Teardown 帧。 + 2. AP 发送的 TWT 参数为 Alternate 或 Dictate 类型，此时 Station 不会与 AP 建立起 iTWT 协商，但可以在接下来使用该参数向 AP 发起 iTWT 协商建立请求。 + + - WIFI_EVENT_ITWT_SUSPEND + + 在调用 API :cpp:func:`esp_wifi_sta_itwt_suspend` 请求暂停已经建立的 iTWT 协商时， 用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_SUSPEND` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_suspend_t` 结构体中，其成员变量 status 指示了此次事件的状态。 + 当 status 为 :c:macro:`ESP_OK` 时代表成功暂停了指定的 iTWT 协商，为其他值代表请求暂停失败。 + + .. note:: + 注意，调用 API :cpp:func:`esp_wifi_sta_itwt_suspend` 请求暂停 iTWT 时，用户需要指定对应 iTWT 的 flow_id 以及暂停时间。需要注意的是，当暂停时间大于 0 时，对应 iTWT 会在暂停指定时间后恢复，而当暂停时间为 0 时，对应的 iTWT 会暂停，直到被用户调用 API 手动恢复为止。 + + - WIFI_EVENT_ITWT_TEARDOWN + + 在调用 API :cpp:func:`esp_wifi_sta_itwt_teardown` 请求终止 iTWT 时，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_TEARDOWN` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_teardown_t` 结构体中，其成员变量 status 指示了此次事件的状态。 + 当 status 为 :cpp:enumerator:`ITWT_TEARDOWN_SUCCESS` 时代表成功终止了指定的 iTWT 协商，为其他值代表终止 iTWT 失败。调用 API 时用户需要指定需要终止的 iTWT 的 flow_id。 + + - WIFI_EVENT_TWT_WAKEUP + + 当 Station 在休眠中醒来时，Wi-Fi 驱动程序将会上报 :cpp:enumerator:`WIFI_EVENT_TWT_WAKEUP` 事件，用户可以在该事件的对应处理程序中自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_twt_wakeup_t` 结构体中，成员变量 twt_type 指示了此次事件 TWT 的类型，成员变量 flow_id 指示了此次醒来的具体的 TWT。 + + - WIFI_EVENT_ITWT_PROBE + + 调用 API :cpp:func:`esp_wifi_sta_itwt_send_probe_req` 在 iTWT 期间发送 probe request 时，用户可以在 :cpp:enumerator:`WIFI_EVENT_ITWT_PROBE` 事件的对应处理程序中获取请求结果并自定义处理逻辑。事件结果保存在 :cpp:type:`wifi_event_sta_itwt_probe_t` 结构体中，其成员变量 status 指示了此次事件的状态。 + 当 status 为 :cpp:enumerator:`ITWT_PROBE_SUCCESS` 时代表成功发送 probe request 并且接收到 AP 回复的 probe response，为其他值代表发送或者接收 probe 失败。 + + + 有关 iTWT 使用的更多信息，可以参考示例 :example:`wifi/itwt` 。 + + TWT 功耗分析 + +++++++++++++ + + 为了展现 TWT 在节省设备功耗方面的优势，我们使用功率分析仪追踪了 {IDF_TARGET_NAME} 在不同模式下的电流情况。如下图所示，{IDF_TARGET_NAME} 首先处于 DTIM 模式，接着与 AP 建立起 iTWT 协商，TWT Wake Interval 为 10 s，在 TWT SP 结束后，{IDF_TARGET_NAME} 会进入 Light-sleep 状态直到下个 SP 到来时唤醒。 + 其中 :cpp:type:`wifi_twt_setup_config_t` 配置示例如下： + + .. code-block:: C + + wifi_twt_setup_config_t setup_config = { + .setup_cmd = TWT_REQUEST, + .flow_id = 0, + .twt_id = 0, + .flow_type = 0, + .min_wake_dura = 255, + .wake_duration_unit = 0, + .wake_invl_expn = 10, + .wake_invl_mant = 10000, + .trigger = 1, + .timeout_time_ms = 5000, + }; + + .. figure:: ../../_static/itwt_10s_current.png + :align: center + + DTIM 与 iTWT 模式下的电流图 + + 进一步，将 TWT 协商中的 TWT Wake Interval 参数更改为 30 s，下图展现了参数变化对于电流的影响。 + 其中 :cpp:type:`wifi_twt_setup_config_t` 配置示例如下： + + .. code-block:: C + + wifi_twt_setup_config_t setup_config = { + .setup_cmd = TWT_REQUEST, + .flow_id = 0, + .twt_id = 0, + .flow_type = 0, + .min_wake_dura = 255, + .wake_duration_unit = 0, + .wake_invl_expn = 10, + .wake_invl_mant = 30000, + .trigger = 1, + .timeout_time_ms = 5000, + }; + + .. figure:: ../../_static/itwt_30s_current.png + :align: center + + 更改参数后的 DTIM 与 iTWT 模式下的电流图 From 3fcedf6432be1f99924948045922f522fdbc5590 Mon Sep 17 00:00:00 2001 From: yinqingzhao Date: Thu, 4 Jul 2024 15:42:04 +0800 Subject: [PATCH 14/17] fix(wifi):fix some wifi bugs --- components/esp_wifi/lib | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index 97850a864669..b427dba32c98 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit 97850a864669fe1e98c7d812984e2d5ab70ccc5c +Subproject commit b427dba32c98cc1cbc2aa286c8d35679649aa99d From a45e4b3dca487b05f2d4935e65d92e4bc81bf969 Mon Sep 17 00:00:00 2001 From: Jakob Hasse Date: Mon, 24 Jun 2024 11:37:38 +0200 Subject: [PATCH 15/17] fix(bootloader_support): Fixed pattern in RNG enable function on C6 to avoid output on IO0 --- components/bootloader_support/src/bootloader_random_esp32c6.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/components/bootloader_support/src/bootloader_random_esp32c6.c b/components/bootloader_support/src/bootloader_random_esp32c6.c index 682e48544c8c..0efd9d4c086d 100644 --- a/components/bootloader_support/src/bootloader_random_esp32c6.c +++ b/components/bootloader_support/src/bootloader_random_esp32c6.c @@ -53,7 +53,7 @@ void bootloader_random_enable(void) // create patterns and set them in pattern table uint32_t pattern_one = (SAR2_CHANNEL << 2) | SAR2_ATTEN; // we want channel 9 with max attenuation - uint32_t pattern_two = SAR1_ATTEN; // we want channel 0 with max attenuation, channel doesn't really matter here + uint32_t pattern_two = (SAR2_CHANNEL << 2) | SAR1_ATTEN; // we want channel 9 with max attenuation uint32_t pattern_table = 0 | (pattern_two << 3 * PATTERN_BIT_WIDTH) | pattern_one << 2 * PATTERN_BIT_WIDTH; REG_WRITE(APB_SARADC_SAR_PATT_TAB1_REG, pattern_table); From cd0ffdac129e773c66c70d5bede02864c788335a Mon Sep 17 00:00:00 2001 From: "wangtao@espressif.com" Date: Fri, 5 Jul 2024 10:55:10 +0800 Subject: [PATCH 16/17] feat(wifi): add softap csa&dtim&wait_bcast_data setting and ignore err nodata v5.2 --- components/esp_rom/esp32c2/ld/esp32c2.rom.ld | 2 +- components/esp_wifi/Kconfig | 21 +++++++++++++++---- .../esp_wifi/include/esp_private/wifi.h | 17 ++++++++++++--- components/esp_wifi/include/esp_wifi.h | 4 ++-- components/esp_wifi/include/esp_wifi_types.h | 2 ++ components/esp_wifi/lib | 2 +- components/esp_wifi/src/wifi_init.c | 10 ++++++--- 7 files changed, 44 insertions(+), 14 deletions(-) diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld index 2b58e7ac87f4..2ce2111a8175 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld @@ -1925,7 +1925,7 @@ ieee80211_send_deauth = 0x40002120; ieee80211_alloc_deauth = 0x40002124; ieee80211_send_proberesp = 0x40002128; ieee80211_getcapinfo = 0x40002130; -sta_rx_csa = 0x40002134; +/* sta_rx_csa = 0x40002134; */ /* sta_recv_sa_query_resp = 0x40002144; */ ieee80211_set_max_rate = 0x4000214c; ic_set_sta = 0x40002150; diff --git a/components/esp_wifi/Kconfig b/components/esp_wifi/Kconfig index 86779183906e..07437eca57e8 100644 --- a/components/esp_wifi/Kconfig +++ b/components/esp_wifi/Kconfig @@ -327,17 +327,30 @@ menu "Wi-Fi" int "Minimum active time" range 8 60 default 50 - depends on ESP_WIFI_SLP_IRAM_OPT help - The minimum timeout for waiting to receive data, unit: milliseconds. + Only for station in WIFI_PS_MIN_MODEM or WIFI_PS_MAX_MODEM. When the station enters the active state, + it will work for at least ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME. If a data packet is received or sent + during this period, the time will be refreshed. If the time is up, but the station still has packets + to receive or send, the time will also be refreshed. unit: milliseconds. config ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME int "Maximum keep alive time" range 10 60 default 10 - depends on ESP_WIFI_SLP_IRAM_OPT help - The maximum time that wifi keep alive, unit: seconds. + Only for station in WIFI_PS_MIN_MODEM or WIFI_PS_MAX_MODEM. If no packet has been + sent within ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME, a null data packet will be sent + to maintain the connection with the AP. unit: seconds. + + config ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME + int "Minimum wait broadcast data time" + range 10 30 + default 15 + help + Only for station in WIFI_PS_MIN_MODEM or WIFI_PS_MAX_MODEM. When the station knows through the beacon + that AP will send broadcast packet, it will wait for ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME + before entering the sleep process. If a broadcast packet is received with more data bits, the time + will refreshed. unit: milliseconds. config ESP_WIFI_FTM_ENABLE bool "WiFi FTM" diff --git a/components/esp_wifi/include/esp_private/wifi.h b/components/esp_wifi/include/esp_private/wifi.h index 12c4122f9455..ec9f2fae1ffe 100644 --- a/components/esp_wifi/include/esp_private/wifi.h +++ b/components/esp_wifi/include/esp_private/wifi.h @@ -618,13 +618,13 @@ esp_err_t esp_wifi_internal_set_spp_amsdu(wifi_interface_t ifidx, bool spp_cap, void esp_wifi_internal_update_light_sleep_default_params(int min_freq_mhz, int max_freq_mhz); /** - * @brief Set the delay time for wifi to enter the sleep state when light sleep + * @brief Set the min active time for wifi to enter the sleep state when light sleep * - * @param return_to_sleep_delay: minimum timeout time for waiting to receive + * @param min_active_time: minimum timeout time for waiting to receive * data, when no data is received during the timeout period, * the wifi enters the sleep process. */ -void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay); +void esp_wifi_set_sleep_min_active_time(uint32_t min_active_time); /** * @brief Set wifi keep alive time @@ -633,6 +633,17 @@ void esp_wifi_set_sleep_delay_time(uint32_t return_to_sleep_delay); */ void esp_wifi_set_keep_alive_time(uint32_t keep_alive_time); +/** + * @brief Set the min broadcast data wait time for wifi to enter the sleep state + * + * @attention Default sleep wait broadcast data time is 15000, Uint µs. + * + * @param time: When the station knows through the beacon that the AP + * will send broadcast packet, it will wait for a minimum of + * wait_broadcast_data_time before entering the sleep process. + */ +void esp_wifi_set_sleep_wait_broadcast_data_time(uint32_t time); + /** * @brief Configure wifi beacon montior default parameters * diff --git a/components/esp_wifi/include/esp_wifi.h b/components/esp_wifi/include/esp_wifi.h index 6d49a1de9f5e..5bb4d4d28a86 100644 --- a/components/esp_wifi/include/esp_wifi.h +++ b/components/esp_wifi/include/esp_wifi.h @@ -347,7 +347,7 @@ esp_err_t esp_wifi_get_mode(wifi_mode_t *mode); * @return * - ESP_OK: succeed * - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init - * - ESP_ERR_INVALID_ARG: invalid argument + * - ESP_ERR_INVALID_ARG: It doesn't normally happen, the function called inside the API was passed invalid argument, user should check if the wifi related config is correct * - ESP_ERR_NO_MEM: out of memory * - ESP_ERR_WIFI_CONN: WiFi internal error, station or soft-AP control block wrong * - ESP_FAIL: other WiFi internal errors @@ -538,7 +538,7 @@ esp_err_t esp_wifi_scan_get_ap_record(wifi_ap_record_t *ap_record); * - ESP_ERR_WIFI_NOT_INIT: WiFi is not initialized by esp_wifi_init * - ESP_ERR_WIFI_NOT_STARTED: WiFi is not started by esp_wifi_start * - ESP_ERR_WIFI_MODE: WiFi mode is wrong - * - ESP_ERR_INVALID_ARG: invalid argument + * - ESP_ERR_INVALID_ARG: It doesn't normally happen, the function called inside the API was passed invalid argument, user should check if the wifi related config is correct */ esp_err_t esp_wifi_clear_ap_list(void); diff --git a/components/esp_wifi/include/esp_wifi_types.h b/components/esp_wifi/include/esp_wifi_types.h index 95dbc8d9447e..25e6d73e4fa2 100644 --- a/components/esp_wifi/include/esp_wifi_types.h +++ b/components/esp_wifi/include/esp_wifi_types.h @@ -298,6 +298,8 @@ typedef struct { uint8_t ssid_hidden; /**< Broadcast SSID or not, default 0, broadcast the SSID */ uint8_t max_connection; /**< Max number of stations allowed to connect in */ uint16_t beacon_interval; /**< Beacon interval which should be multiples of 100. Unit: TU(time unit, 1 TU = 1024 us). Range: 100 ~ 60000. Default value: 100 */ + uint8_t csa_count; /**< Channel Switch Announcement Count. Notify the station that the channel will switch after the csa_count beacon intervals. Default value: 3 */ + uint8_t dtim_period; /**< Dtim period of soft-AP. Default value: 2 */ wifi_cipher_type_t pairwise_cipher; /**< Pairwise cipher of SoftAP, group cipher will be derived using this. Cipher values are valid starting from WIFI_CIPHER_TYPE_TKIP, enum values before that will be considered as invalid and default cipher suites(TKIP+CCMP) will be used. Valid cipher suites in softAP mode are WIFI_CIPHER_TYPE_TKIP, WIFI_CIPHER_TYPE_CCMP and WIFI_CIPHER_TYPE_TKIP_CCMP. */ bool ftm_responder; /**< Enable FTM Responder mode */ wifi_pmf_config_t pmf_cfg; /**< Configuration for Protected Management Frame */ diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index b427dba32c98..21b94ecb0303 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit b427dba32c98cc1cbc2aa286c8d35679649aa99d +Subproject commit 21b94ecb0303ca880c16585d7f5948ea615c2223 diff --git a/components/esp_wifi/src/wifi_init.c b/components/esp_wifi/src/wifi_init.c index e70facdca011..89746ef82f94 100644 --- a/components/esp_wifi/src/wifi_init.c +++ b/components/esp_wifi/src/wifi_init.c @@ -320,12 +320,16 @@ esp_err_t esp_wifi_init(const wifi_init_config_t *config) esp_pm_register_light_sleep_default_params_config_callback(esp_wifi_internal_update_light_sleep_default_params); - uint32_t sleep_delay_us = CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME * 1000; - esp_wifi_set_sleep_delay_time(sleep_delay_us); +#endif + + uint32_t min_active_time_us = CONFIG_ESP_WIFI_SLP_DEFAULT_MIN_ACTIVE_TIME * 1000; + esp_wifi_set_sleep_min_active_time(min_active_time_us); uint32_t keep_alive_time_us = CONFIG_ESP_WIFI_SLP_DEFAULT_MAX_ACTIVE_TIME * 1000 * 1000; esp_wifi_set_keep_alive_time(keep_alive_time_us); -#endif + + uint32_t wait_broadcast_data_time_us = CONFIG_ESP_WIFI_SLP_DEFAULT_WAIT_BROADCAST_DATA_TIME * 1000; + esp_wifi_set_sleep_wait_broadcast_data_time(wait_broadcast_data_time_us); #if CONFIG_FREERTOS_USE_TICKLESS_IDLE #if SOC_PM_MODEM_RETENTION_BY_REGDMA From e8ac1be60c27121ed546ef122ad7421278c20ac7 Mon Sep 17 00:00:00 2001 From: Rahul Tank Date: Fri, 5 Jul 2024 18:08:13 +0530 Subject: [PATCH 17/17] Revert "fix(nimble): Added debug print to check for skipped adv report" This reverts commit e29f31bca4387bd146f39a1216effffeab8d2e2a. --- components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c | 1 - 1 file changed, 1 deletion(-) diff --git a/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c b/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c index 4fa8a1090b8a..605b831211cd 100644 --- a/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c +++ b/components/bt/host/nimble/esp-hci/src/esp_nimble_hci.c @@ -217,7 +217,6 @@ static int host_rcv_pkt(uint8_t *data, uint16_t len) evbuf = ble_transport_alloc_evt(1); /* Skip advertising report if we're out of memory */ if (!evbuf) { - ESP_LOGI(TAG, "Skipping advertising report due to low memory"); return 0; } } else {