From b7f24804b8cc52bc18ebc06fbb7948f087700937 Mon Sep 17 00:00:00 2001 From: Lukas Abelt Date: Mon, 8 Apr 2024 09:24:39 +0200 Subject: [PATCH 1/2] Updated documentation for CLion Setup (#881) I noticed that the documentation for the CLion setup is a bit outdated and has some minor mistakes. This PR synchronizes the documentation with what the build scripts (build_setup.sh) set as options for compilation. --------- Co-authored-by: Lukas Abelt --- .../vara/add_setup_infos/clion_setup.rst | 24 +++++++++++++++---- 1 file changed, 20 insertions(+), 4 deletions(-) diff --git a/docs/source/research_tool_docs/vara/add_setup_infos/clion_setup.rst b/docs/source/research_tool_docs/vara/add_setup_infos/clion_setup.rst index ae03bf107..98a5c6869 100644 --- a/docs/source/research_tool_docs/vara/add_setup_infos/clion_setup.rst +++ b/docs/source/research_tool_docs/vara/add_setup_infos/clion_setup.rst @@ -22,24 +22,31 @@ How to set up VaRA/LLVM in CLion -DBUILD_SHARED_LIBS=ON -DCMAKE_C_FLAGS_DEBUG="-O2 -g -fno-omit-frame-pointer" -DCMAKE_CXX_FLAGS_DEBUG="-O2 -g -fno-omit-frame-pointer" + -DCMAKE_SHARED_LINKER_FLAGS="-Wl,--undefined-version" -DCMAKE_CXX_STANDARD=17 -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_INSTALL_PREFIX=/tools/VaRA -DLLVM_ENABLE_ASSERTIONS=ON -DLLVM_ENABLE_BINDINGS=OFF -DLLVM_ENABLE_EH=ON - -DLLVM_ENABLE_LDD=ON + -DLLVM_ENABLE_LLD=ON -DLLVM_ENABLE_PROJECTS="clang;lld;compiler-rt;clang-tools-extra;vara;phasar" -DLLVM_ENABLE_RTTI=ON -DLLVM_OPTIMIZED_TABLEGEN=ON -DLLVM_PARALLEL_LINK_JOBS=4 -DLLVM_PHASAR_BUILD=ON + -DLLVM_TOOL_PHASAR_BUILD=ON + -DPHASAR_ENABLE_DYNAMIC_LOG=OFF + -DPHASAR_BUILD_IR=OFF + -DPHASAR_BUILD_UNITTESTS=OFF -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_TOOL_PHASAR_BUILD=ON - -DLLVM_USE_NEWPM=ON -DUSE_HTTPS=OFF -DUSE_SSH=OFF -DVARA_BUILD_LIBGIT=ON + -DVARA_FEATURE_BUILD_PYTHON_BINDINGS=OFF + -DVARA_FEATURE_BUILD_Z3_SOLVER=ON + -DVARA_FEATURE_USE_Z3_SOLVER=ON Use ``-O0`` for debug builds and ``-O2`` for development builds. @@ -57,22 +64,31 @@ How to set up VaRA/LLVM in CLion -DBUILD_SHARED_LIBS=ON -DCMAKE_C_FLAGS_RELEASE="-O3 -DNDEBUG -march=native -fno-omit-frame-pointer -gmlt" -DCMAKE_CXX_FLAGS_RELEASE="-O3 -DNDEBUG -march=native -fno-omit-frame-pointer -gmlt" + -DCMAKE_SHARED_LINKER_FLAGS="-Wl,--undefined-version" -DCMAKE_CXX_STANDARD=17 + -DCMAKE_EXPORT_COMPILE_COMMANDS=ON -DCMAKE_INSTALL_PREFIX=/tools/VaRA -DLLVM_ENABLE_ASSERTIONS=OFF -DLLVM_ENABLE_BINDINGS=OFF -DLLVM_ENABLE_EH=ON - -DLLVM_ENABLE_LDD=ON + -DLLVM_ENABLE_LLD=ON -DLLVM_ENABLE_PROJECTS="clang;lld;compiler-rt;clang-tools-extra;vara;phasar" -DLLVM_ENABLE_RTTI=ON + -DLLVM_OPTIMIZED_TABLEGEN=ON -DLLVM_PARALLEL_LINK_JOBS=4 -DLLVM_PHASAR_BUILD=ON + -DLLVM_TOOL_PHASAR_BUILD=ON + -DPHASAR_ENABLE_DYNAMIC_LOG=OFF + -DPHASAR_BUILD_IR=OFF + -DPHASAR_BUILD_UNITTESTS=OFF -DLLVM_TARGETS_TO_BUILD=X86 -DLLVM_TOOL_PHASAR_BUILD=ON - -DLLVM_USE_NEWPM=ON -DUSE_HTTPS=OFF -DUSE_SSH=OFF -DVARA_BUILD_LIBGIT=ON + -DVARA_FEATURE_BUILD_PYTHON_BINDINGS=OFF + -DVARA_FEATURE_BUILD_Z3_SOLVER=ON + -DVARA_FEATURE_USE_Z3_SOLVER=ON - **Build directory:** ``/tools_src/vara-llvm-project/build/dev-clion`` - **Build options:** leave empty From cecda8b7ee14cc63272af34425aa952d92c12b3b Mon Sep 17 00:00:00 2001 From: Lukas Abelt Date: Mon, 22 Apr 2024 09:53:32 +0200 Subject: [PATCH 2/2] Minor adjustments for feature perf precision experiments (#883) Adds some minor fixes for our feature performance experiments and tables: - Adjust PicoSAT instruction threshold - Adjust binary selection for Dune - Include eBPF profiler in precision table --------- Co-authored-by: Lukas Abelt --- .../vara/feature_perf_precision.py | 31 ++++++++++++++----- .../varats/tables/feature_perf_precision.py | 2 +- 2 files changed, 24 insertions(+), 9 deletions(-) diff --git a/varats/varats/experiments/vara/feature_perf_precision.py b/varats/varats/experiments/vara/feature_perf_precision.py index 52a01ff3a..185931615 100644 --- a/varats/varats/experiments/vara/feature_perf_precision.py +++ b/varats/varats/experiments/vara/feature_perf_precision.py @@ -16,6 +16,7 @@ from plumbum import local, BG from plumbum.commands.modifiers import Future +from varats.base.configuration import PatchConfiguration from varats.data.reports.performance_influence_trace_report import ( PerfInfluenceTraceReportAggregate, ) @@ -44,7 +45,7 @@ from varats.report.report import ReportSpecification from varats.report.tef_report import TEFReportAggregate from varats.tools.research_tools.vara import VaRA -from varats.utils.config import get_current_config_id +from varats.utils.config import get_current_config_id, get_config from varats.utils.git_util import ShortCommitHash REPS = 3 @@ -77,10 +78,24 @@ def perf_prec_workload_commands( def select_project_binaries(project: VProject) -> tp.List[ProjectBinaryWrapper]: """Uniformly select the binaries that should be analyzed.""" if project.name == "DunePerfRegression": - return [ - binary for binary in project.binaries - if binary.name == "poisson_yasp_q2_3d" - ] + config = get_config(project, PatchConfiguration) + if not config: + return [] + + f_tags = {opt.value for opt in config.options()} + + grid_binary_map = { + "YaspGrid": "poisson_yasp_q2_3d", + "UGGrid": "poisson_ug_pk_2d", + "ALUGrid": "poisson_alugrid" + } + + for grid, binary_name in grid_binary_map.items(): + if grid in f_tags: + return [ + binary for binary in project.binaries + if binary.name == binary_name + ] return [project.binaries[0]] @@ -99,14 +114,14 @@ def get_threshold(project: VProject) -> int: if project.DOMAIN is ProjectDomains.TEST: if project.name in [ "SynthSAFieldSensitivity", "SynthIPRuntime", "SynthIPTemplate", - "SynthIPTemplate2", "SynthIPCombined", "PicoSATLoadTime" + "SynthIPTemplate2", "SynthIPCombined" ]: # Don't instrument everything for these synthetic projects return 10 return 0 - if project.name in ["HyTeg"]: + if project.name in ["HyTeg", "PicoSATLoadTime"]: return 0 return 100 @@ -343,7 +358,7 @@ def run_traced_code(self, tmp_dir: Path) -> StepResult: f"Running example {prj_command.command.label}" ) - bpf_runner = bpf_runner = self.attach_usdt_bcc( + bpf_runner = self.attach_usdt_bcc( local_tracefile_path, self.project.source_of_primary / self._binary.path diff --git a/varats/varats/tables/feature_perf_precision.py b/varats/varats/tables/feature_perf_precision.py index 212765368..d1b2b4453 100644 --- a/varats/varats/tables/feature_perf_precision.py +++ b/varats/varats/tables/feature_perf_precision.py @@ -169,7 +169,7 @@ def _prepare_data_table( def tabulate(self, table_format: TableFormat, wrap_table: bool) -> str: """Setup performance precision table.""" case_studies = get_loaded_paper_config().get_all_case_studies() - profilers: tp.List[Profiler] = [VXray(), PIMTracer()] + profilers: tp.List[Profiler] = [VXray(), PIMTracer(), EbpfTraceTEF()] # Data aggregation df = self._prepare_data_table(case_studies, profilers)