Feat/Opcode Circuits for DIV, REM, and REMU opcodes

ceno_zkvm/src/gadgets/is_lt.rs

@@ -18,6 +18,7 @@ use crate::{
 
 use super::SignedExtendConfig;
 
+// TODO rename to AssertLtConfig (LT -> Lt) to fit naming conventions
 #[derive(Debug, Clone)]
 pub struct AssertLTConfig(InnerLtConfig);
 

ceno_zkvm/src/gadgets/mod.rs

@@ -1,11 +1,13 @@
 mod div;
 mod is_lt;
 mod is_zero;
+mod signed;
 mod signed_ext;
 
 pub use div::DivConfig;
 pub use is_lt::{
     AssertLTConfig, AssertSignedLtConfig, InnerLtConfig, IsLtConfig, SignedLtConfig, cal_lt_diff,
 };
 pub use is_zero::{IsEqualConfig, IsZeroConfig};
+pub use signed::Signed;
 pub use signed_ext::SignedExtendConfig;

ceno_zkvm/src/gadgets/signed.rs

@@ -0,0 +1,57 @@
+use std::{fmt::Display, mem::MaybeUninit};
+
+use ff_ext::ExtensionField;
+
+use crate::{
+    Value,
+    circuit_builder::CircuitBuilder,
+    error::ZKVMError,
+    expression::Expression,
+    instructions::riscv::constants::{BIT_WIDTH, UInt},
+    witness::LkMultiplicity,
+};
+
+use super::SignedExtendConfig;
+
+/// Interprets a `UInt` value as a 2s-complement signed value.
+///
+/// Uses 1 `WitIn` to represent the MSB of the value.
+pub struct Signed<E: ExtensionField> {
+    pub is_negative: SignedExtendConfig<E>,
+    val: Expression<E>,
+}
+
+impl<E: ExtensionField> Signed<E> {
+    pub fn construct_circuit<NR: Into<String> + Display + Clone, N: FnOnce() -> NR>(
+        cb: &mut CircuitBuilder<E>,
+        name_fn: N,
+        unsigned_val: &UInt<E>,
+    ) -> Result<Self, ZKVMError> {
+        cb.namespace(name_fn, |cb| {
+            let is_negative = unsigned_val.is_negative(cb)?;
+            let val = unsigned_val.value() - (1u64 << BIT_WIDTH) * is_negative.expr();
+
+            Ok(Self { is_negative, val })
+        })
+    }
+
+    pub fn assign_instance(
+        &self,
+        instance: &mut [MaybeUninit<E::BaseField>],
+        lkm: &mut LkMultiplicity,
+        val: &Value<u32>,
+    ) -> Result<i32, ZKVMError> {
+        self.is_negative.assign_instance(
+            instance,
+            lkm,
+            *val.as_u16_limbs().last().unwrap() as u64,
+        )?;
+        let signed_val = val.as_u32() as i32;
+
+        Ok(signed_val)
+    }
+
+    pub fn expr(&self) -> Expression<E> {
+        self.val.clone()
+    }
+}

ceno_zkvm/src/gadgets/signed_ext.rs

@@ -9,11 +9,16 @@ use crate::{
 use ff_ext::ExtensionField;
 use std::{marker::PhantomData, mem::MaybeUninit};
 
+/// Extract the most significant bit from an expression previously constrained
+/// to an 8- or 16-bit length.
+///
+/// Uses 1 `WitIn` value to store the bit, one `assert_bit` constraint, and one
+/// `u8` or `u16` table lookup.
 #[derive(Debug)]
 pub struct SignedExtendConfig<E> {
-    /// most significant bit
+    /// Most significant bit
     msb: WitIn,
-    /// number of bits contained in the value
+    /// Number of bits of the represented value
     n_bits: usize,
 
     _marker: PhantomData<E>,

ceno_zkvm/src/instructions/riscv.rs

@@ -11,7 +11,7 @@ pub mod arith_imm;
 pub mod branch;
 pub mod config;
 pub mod constants;
-pub mod divu;
+pub mod div;
 pub mod dummy;
 pub mod ecall;
 pub mod jump;