From 33dff11490be09087c94d63410bf4ef48f5d74a1 Mon Sep 17 00:00:00 2001 From: Jakub Onderka Date: Tue, 3 Sep 2024 15:37:22 +0200 Subject: [PATCH] Update zlib library to 2.2.1 --- Cargo.toml | 2 ++ src/zlib-ng | 2 +- zng/cc.rs | 24 ++++++++++++++++-------- 3 files changed, 19 insertions(+), 9 deletions(-) diff --git a/Cargo.toml b/Cargo.toml index b73f8868..cefdd469 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -39,6 +39,8 @@ include = [ # zlib-ng cmake "src/zlib-ng/CMakeLists.txt", "src/zlib-ng/zlib.pc.cmakein", + "src/zlib-ng/zlib-config.cmake.in", + "src/zlib-ng/zlib-ng-config.cmake.in", "src/zlib-ng/cmake", ] diff --git a/src/zlib-ng b/src/zlib-ng index 74253725..d54e3769 160000 --- a/src/zlib-ng +++ b/src/zlib-ng @@ -1 +1 @@ -Subproject commit 74253725f884e2424a0dd8ae3f69896d5377f325 +Subproject commit d54e3769be0c522015b784eca2af258b1c026107 diff --git a/zng/cc.rs b/zng/cc.rs index 09874e2d..efda22fc 100644 --- a/zng/cc.rs +++ b/zng/cc.rs @@ -112,14 +112,10 @@ pub fn build_zlib_ng(target: &str, compat: bool) { None, &[ "adler32", - "adler32_fold", - "chunkset", - "compare256", "compress", "cpu_features", - "crc32_braid", + "crc32", "crc32_braid_comb", - "crc32_fold", "deflate", "deflate_fast", "deflate_huff", @@ -137,13 +133,25 @@ pub fn build_zlib_ng(target: &str, compat: bool) { "inftrees", "insert_string", "insert_string_roll", - "slide_hash", "trees", "uncompr", "zutil", ], ); + cfg.append( + Some("arch/generic"), + &[ + "adler32_c", + "adler32_fold_c", + "chunkset_c", + "compare256_c", + "crc32_braid_c", + "crc32_fold_c", + "slide_hash_c", + ] + ); + if compat { cfg.define("ZLIB_COMPAT", None); } @@ -238,7 +246,7 @@ pub fn build_zlib_ng(target: &str, compat: bool) { // SSE4.2 cfg.define("X86_SSE42", None); - cfg.append(Some("arch/x86"), &["adler32_sse42", "insert_string_sse42"]); + cfg.append(Some("arch/x86"), &["adler32_sse42"]); cfg.mflag("-msse4.2", "/arch:SSE4.2"); // AVX-512 @@ -302,7 +310,7 @@ pub fn build_zlib_ng(target: &str, compat: bool) { // for arm, don't know if that is still true though if !cfg.is_msvc || is_aarch64 { cfg.define("ARM_ACLE", None).define("HAVE_ARM_ACLE_H", None); - cfg.append(Some("arch/arm"), &["crc32_acle", "insert_string_acle"]); + cfg.append(Some("arch/arm"), &["crc32_acle"]); // When targeting aarch64 we already need to specify +simd, so // we do that once later in this block if !is_aarch64 {